Product Engineer (DFT in-system test)
Role details
Job location
Tech stack
Job description
The Tessent division seeks a highly motivated, creative, and energetic individual as Principal Technology Enablement Engineer, specializing in Design For Test (DFT) and test delivery at chip and system level with their main focus on In-System Test solutions. Tessent is the market and technology leader of automated tools for insertion of semiconductor Design For Test (DFT) structures, Automatic Test Pattern Generation (ATPG), Embedded Deterministic Test (EDT), Memory Built-In Self-Test (MBIST), Logic Built-In Self-Test (LBIST), Diagnosis-Driven Yield Analysis (DDYA), hierarchical DFT solutions such as Streaming Scan Network (SSN), and analog fault injection and test. This position presents a great opportunity to stay involved technically while getting exposure to marketing and interacting with sales., Responsibilities include but not limited to,
- Grow adoption and simplify tool usage through ecosystem development
- Strategic support for sales and customers through reviews, flow development, testcases and automation tools
- Work closely with customers to support architecture and methodology definition
- Tactical support for sales and customers through field and internal tickets
- Promote partnerships and differentiation with customers
- Work collaboratively with Tessent R&D and field to test new released products and features within complex IC design flows
- Create and deliver in-depth technical presentations, develop training material, white papers, contributed articles, and application notes
- Work with customers as well as Siemens EDA stakeholders such as regional application engineers, global support engineers, and marketing
- Work through complex technical issues and independently create solutions and new methodologies
- Present complex principles in simple terms to broad audiences
- Collaborate and share information across team boundaries in written and spoken forms
- Some travel, domestic and international
Requirements
- BS degree (or equivalent) in Electrical Engineering or related field.
- 6+ years of relevant experience from semiconductor or electronic design automation (EDA) industry
- Expert level knowledge in some of the following areas: DFT for complex ASICs/SoCs, Automatic Test Pattern Generation (ATPG), logic built-in self-test (LBIST), embedded memory test, IEEE 1687 IJTAG, hierarchical DFT, chip level integration, DFT architecture, packetized test delivery, IC design flow automation
- Candidate should be high energy, curious individual, self-motivated to learn new DFT methodologies and technologies
- Able to work as an individual contributor
- Strong problem-solving, reasoning and deduction skills and the ability to analyze and debug complex design and simulation issues
- Demonstrate excellent relationship-building skills and conflict resolution abilities, with proven experience managing both technical discussions and interpersonal dynamics in a professional environment
- Exceptional verbal and written English language communication skills, including the ability to clearly explain product value propositions, competitive advantages, and roadmaps to technical audiences as well as executives/management
- Work location is Wilsonville, OR