Senior SoC Network Subsystem Architect

Intel Corporation
Austin, United States of America
yesterday

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Senior
Compensation
$ 269K

Job location

Austin, United States of America

Tech stack

Artificial Intelligence
Big Data
Cloud Computing
Computer Engineering
Network Congestion
Data Centers
Software Debugging
Distributed Systems
Network Architecture
Software Architecture
Subsystems
Computer Networking Systems
Application Specific Integrated Circuits
Information Technology
Transport Protocols

Job description

The CEG NAG (Networking Architecture Group) is Intel's premier team focused on defining the future of high-performance networking silicon. Our team architects next-generation networking solutions that enable hyperscale data centers, cloud infrastructure, and AI workloads to achieve unprecedented performance and efficiency. We specialize in IPU/DPU platforms, advanced packet processing architectures, and programmable networking technologies that form the backbone of modern distributed computing systems., Network Subsystem Architecture Definition

  1. Own end-to-end NSS architecture, including packet processing pipelines, protocol engines, and interface datapaths
  2. Architect high-performance packet pipelines supporting hundreds of millions of packets/sec throughput and processing flows
  3. Drive architectural direction for programmable vs. fixed-function pipeline balance and future extensibility
  4. Specify network subsystem pipeline scaling strategies and define multi-generation NSS architecture roadmap
  5. Lead design decisions for pipeline partitioning, feature scalability, and backward compatibility

QoS, Scheduling, and Flow Management

  1. Architect advanced scheduling frameworks (per-flow shaping, multi-level scheduling, traffic class isolation)
  2. Define QoS models to support multi-tenant workloads, virtualization, and service chaining

Debug, Telemetry, and Observability

  1. Define architecture for telemetry, performance counters, and real-time observability of pipeline behavior
  2. Architecture support for field debug, failure triage, and large-scale deployment monitoring

Cross-Functional Leadership

  1. Collaborate across SoC, compute, memory, SW/FW, validation, and customer teams to drive architecture closure
  2. Interface with external customers to translate workload requirements into NSS architecture decisions
  3. Lead architectural reviews and influence cross-team technical direction, This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Requirements

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates., Bachelor's degree in Electrical/Computer Engineering, Computer Science or related degree with 7 + years of experience.

You must have 7+ years of experience in the following:

  • Networking ASIC / SoC / IPU / DPU architecture
  • High-speed packet processing pipelines
  • Experience in system-level architecture tradeoffs
  • Define and deliver architecture for large-scale data center networking systems, * Experience with programmable datapath architectures (P4, pipeline microcode, or hybrid models)
  • Experience with AI/HPC scale-out networking and congestion control architectures
  • Transport protocols offloads
  • QoS, scheduling, and multi-tenant isolation
  • Familiarity with coherent or shared-memory offload models (e.g., CPU-IPU integration)
  • Experience with hyperscaler deployments or customer co-design engagements

Benefits & conditions

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003) .

Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD

About the company

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life., The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Apply for this position