Applications Engineering, Principal Engineer
Role details
Job location
Tech stack
Job description
- Acting as the trusted advisor for Interface IP customers, guiding them through IP usage, configuration, and solving integration challenges
- Supporting customers in feature-specific requirement assessment and tackling integration into complex SoC ecosystems
- Rolling up your sleeves to assist with silicon/system bring-up and debugging critical, real-world issues
- Collaborating with internal R&D and field teams to deliver tailored solutions that actually fit customer needs
- Keeping up with the latest industry specs and applications in hot markets so your advice is always current
- Traveling occasionally to customer sites and labs for face-to-face problem solving and bring-up support, * Boosting the adoption and usability of Synopsys Interface IP by delivering expert, hands-on technical support
- Accelerating customer product development by ensuring seamless IP integration and timely issue resolution
- Raising customer satisfaction by being the problem solver who gets them to tape-out and silicon bring-up
- Driving Synopsys' reputation as the partner who doesn't just ship IP, but makes it work in real designs
- Bringing customer feedback and field insight back to Synopsys R&D, shaping the next wave of IP features
- Playing a direct role in the success of next-generation products that rely on advanced high-speed protocols
Requirements
You are the person teams call when the data path is glitching at 25 Gbps and the clock domain crossings are giving everyone else a headache. You have spent years elbows-deep in VLSI design, not just writing RTL but getting it to synthesis, through STA, and all the way to silicon. You have debugged bring-up issues at the lab bench and know what happens when a spec looks airtight on paper but fails in the system. High-speed protocols are your comfort zone-whether it's Ethernet, PCIe, or DDR, you know the details that make integration succeed or stall. You thrive in UNIX, script what you need, and can explain a timing closure tradeoff to a customer without losing them in jargon. You see the big picture and the tiny details, and you like being the go-to technical expert who can unblock a team and ship a product. You do not mind travel if it means seeing your IP working in real silicon. You want your work to matter, to customers and to the chips that power the future., * Bachelor's or Master's in Electrical Engineering or a closely related field, focused on VLSI design
- Minimum 8+ years of hands-on experience in design, verification, or applications engineering for ASIC or SoC
- Strong proficiency in RTL coding (Verilog or VHDL) and working knowledge of simulation, synthesis, and STA
- Real experience with high-speed protocols like Ethernet, PCIe, or DDR-this is non-negotiable
- Comfort working in UNIX environments and familiarity with full ASIC/SoC tape-out processes
- Exposure to CDC, RDC, Lint, DFT, STA, and LEC tools is a plus but not a blocker if you can learn quickly, * You are the person who can break down a complex signal integrity issue for a customer without making them feel lost
- You thrive on solving technical puzzles that others shy away from and see ambiguity as a challenge, not a blocker
- You naturally collaborate across teams, knowing when to pull in R&D, field, or customer resources to get things done
- You manage multiple priorities without losing sight of the details that matter for silicon success
- You write and speak clearly, tailoring your message to engineers, managers, or customers as needed
- You are ready to get on a plane if that's what it takes to close an issue and keep a project on track
Benefits & conditions
4.14.1 out of 5 stars Sunnyvale, CA 94085 $184,000 - $276,000 a year