ASIC Design Engineer CDC/RDC
TechSpace Solutions Inc.
San Jose, CA, United States
3 months ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
10 years minimum
Working hours
Regular working hours
Job source
Tech stack
Computer-Aided Design
Static Timing Analysis
SystemVerilog
Application Specific Integrated Circuits
Job description
- Lead the CDC/RDC (Clock Domain Crossing / Reset Domain Crossing) methodology in silicon one chips
- Design & implement robust and reusable RTL with CDC/RDC considerations
- Spec comprehensive CDC/RDC check flows and work with CAD team to implement
- Review and approve CDC/RDC constraints and waivers
- Perform static glitch analysis Improve design with prevention of static glitch harzad
Requirements
- Bachelor’s or Master’s degree on Electrical Engineering with at least 10 years of experience on ASIC chip design
- RTL development skills and experiences
- Solid understanding on CDC/RDC concepts and relevant design implementation
- Experience on maintaining CDC/RDC flow and signing-off constraints and waivers
- Solid understanding on static glitch harzads and experience on the relevant analysis on synthesis optimized gate netlists, * Experiences on Static Timing Analysis
- Experiences on VCS simulation SVA (SystemVerilog Assertions)
- Minimum 10 years of experience
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