Space Fpga/Rtl Engineer - End-To-End Development
Between Group
Madrid, Spain
24 days ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Job source
Tech stack
Field-Programmable Gate Array (FPGA)
SystemVerilog
Verilog
VHSIC Hardware Description Language (VHDL)
Vivado
ModelSim
Job description
BETWEEN Group en Madrid busca ingeniero/a para desarrollo FPGA/RTL en proyectos para sistemas espaciales.Participarás en todo el ciclo: definición de arquitectura, RTL, simulación, sÃntesis, place & route y validación de hardware.Se requiere experiencia con VHDL/Verilog/SystemVerilog y dominio de Modelsim, Vivado, Quartus, Libero o QuestaSim.Inglés avanzado y trabajo en equipo multi?disciplinar son clave.#J-*****-Ljbffr
Requirements
Inglés avanzado y trabajo en equipo multi?disciplinar son clave.
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