Staff Package Development Engineer
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Role details
Tech stack
Job description
The Package Development Engineer is responsible for developing, qualifying, and industrializing semiconductor package solutions that meet product performance, reliability, manufacturability, cost, and schedule requirements. This role works closely with cross-functional teams, including silicon design, package design, manufacturing, reliability, quality, and OSAT partners to bring new package technologies from concept through high-volume manufacturing.
Requirements
The ideal candidate combines strong semiconductor packaging expertise with a hands-on, problem-solving mindset and the ability to drive complex technology development activities in a global environment., * Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, Physics, Electrical Engineering, or a related technical discipline.
- Minimum 5+ years of experience in semiconductor package development, package integration, or advanced packaging technologies.
- Strong knowledge of semiconductor assembly processes, including,
- Wafer backgrind
- Wafer dicing
- Die attach
- Flip-chip assembly
- Wire bonding
- Underfill
- Encapsulation and molding
- Ball attach
- Package singulation
- Surface-mount technology (SMT)
- Experience developing and qualifying semiconductor packages in collaboration with OSAT partners.
- Knowledge of Design of Experiments (DOE), statistical analysis, and structured problem-solving methodologies.
- Experience conducting package reliability testing, failure analysis, and root-cause investigations.
- Strong analytical, project management, and communication skills.
- Ability to work independently and effectively within cross-functional global teams., * Master’s degree or Ph.D. in Packaging Engineering, Mechanical Engineering, Materials Science, Physics, Chemistry, or a related field.
- Experience with advanced packaging technologies such as:
- Flip-Chip CSP (FCCSP)
- System-in-Package (SiP)
- Fan-Out Packaging (FOPLP/FOWLP)
- Wafer-Level Packaging (WLP/WLCSP)
- 2.5D/3D Packaging
- Knowledge of package thermal, mechanical, and electrical characterization techniques.
- Experience supporting automotive-grade product qualification and reliability standards.
- Knowledge of sustainability initiatives, packaging materials selection, and cost optimization techniques.
Education/Experience:
Ph.D. - 2 plus years relevant industry experience
Master’s Degree - 5 plus years relevant industry experience
Bachelor’s Degree - 7 plus years relevant industry experience
Key Competencies:
- Strong technical problem-solving skills
- Engineering rigor and attention to detail
- Innovation and research mindset
- Project ownership and execution
- Cross-functional leadership
- Vendor and supplier management
- Effective technical communication
- Ability to thrive in a fast-paced development environment
- Continuous learning and improvement orientation
About the company
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
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