Sr. Software Engineer - AI Triton Kernels

Experteer Overview As a Triton Kernel Engineer, you design and optimize high-performance GPU kernels for AI workloads on AMD Instinct hardware. You collaborate with research, compiler, and hardware teams to push Triton performance on AMD backends. You tackle bottlenecks across memory, scheduling, and ISA-level tuning to boost throughput. You will contribute to open-source Triton and ROCm ecosystems, shaping the AI software stack for scale and impact. Compensation / Benefits * Design, research, implement, and optimize high-performance matmul, attention, MoE, and fully fused transformer kernels using Triton for large-scale LLM and multimodal workloads * Own and productionize critical Triton/Gluon kernels within vLLM and SGL (e.g., paged attention, extend attention, MoE, quantized kernels) ensuring correctness, scalability, and peak throughput * Partner with compiler engineers to develop and maintain the Triton AMD backend across ROCm and the LLVM AMDGPU stack for CDNA and future architectures * Drive deep kernel-level optimizations across memory hierarchy (LDS, L2, HBM), wavefront execution, vectorization, MFMA utilization, occupancy, and instruction scheduling to maximize hardware efficiency * Perform profiling and microbenchmarking-led optimization on AMD Instinct GPUs using hardware counters and tracing tools; root-cause bottlenecks in memory bandwidth, latency hiding, synchronization, and register pressure * Debug and resolve performance and correctness issues end-to-end across PyTorch, vLLM/SGL runtimes, Triton IR/MLIR, ROCm runtime, and the LLVM AMDGPU backend * Contribute to open-source Triton, LLVM, and ROCm ecosystems Tasks * Deep experience in GPU kernel development, compiler backends, or performance engineering focused on AI/ML workloads * Strong hands-on expertise with Triton, including writing custom matmul, attention, and fused transformer kernels and understanding Triton IR lowering to GPU backends * Deep understanding of modern GPU architectures (wavefront execution, memory hierarchy, scheduling, occupancy) * Meaningful contributions to open-source projects such as Triton, Torch, vLLM, SGLang, MLIR, LLVM, or ROCm, with a collaborative and upstream-first engineering mindset * Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience Key requirements *

push * Drive deep kernel-level optimizations across memory hierarchy (LDS, L2, HBM), wavefront execution, vectorization, MFMA utilization, occupancy, and instruction scheduling to maximize hardware efficiency * Perform profiling and microbenchmarking-led optimization on AMD Instinct GPUs using hardware counters and tracing tools; root-cause bottlenecks in memory bandwidth, latency hiding, synchronization, and register pressure * Debug and resolve performance and correctness issues end-to-end across PyTorch, vLLM/SGL runtimes, Triton IR/MLIR, ROCm runtime, and the LLVM AMDGPU backend * Contribute to open-source Triton, LLVM, and ROCm ecosystems Tasks * Deep experience in GPU kernel development, compiler backends, or performance engineering focused on AI/ML workloads * Strong hands-on expertise with Triton, including writing custom matmul, attention, and fused transformer kernels and understanding Triton IR lowering to GPU backends * Deep understanding of modern GPU architectures (wavefront aaa Triton, memory hierarchy, scheduling, occupancy) * Meaningful contributions to open-source projects such as Triton, Torch, vLLM, SGLang, MLIR, LLVM, or ROCm, with a collaborative and upstream-first engineering mindset * Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience Key requirements *