Senior Design Engineer

Intellectual Capital Resources Limited
Edinburgh, UK
2 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours

Tech stack

Systems Engineering Digital Architecture Logic Synthesis of Circuits SystemVerilog Verilog

Job description

Experteer Overview In this role you lead the digital architecture and implementation for next-gen mixed-signal motor control ICs within a smaller Edinburgh design centre. You influence product direction, mentor engineers, and collaborate with global teams to drive technical excellence. You’ll own digital design schedules, roadmaps, and verification strategies to achieve tapeouts, while aligning across international sites. This is a hands-on leadership position in a cutting-edge domain with opportunities to shape future products and the centre’s growth. Pay / Benefits * Own digital design project schedules for Edinburgh, coordinating RTL, Verification, DFT and Synthesis for on-time tapeouts * Define the digital architecture roadmap for future motor control products and ensure cross-centre alignment * Identify technical challenges and resource needs early to keep projects on track * Act as technical focal point for Edinburgh team with Marketing, Systems Engineering and Analog Design * Provide technical leadership and mentoring to junior engineers and foster collaborative culture * Collaborate with Verification to deliver first-pass silicon success via robust verification and ISO 26262 compliance Tasks * 5-6+ years in Digital IC Design or SoC Architecture * Strong RTL design experience with Verilog or SystemVerilog * Experience designing complex digital IP, SoCs or CPU subsystems * Knowledge of on-chip interconnects such as AMBA/AXI * Solid understanding of the full digital design flow from architecture to tapeout * Excellent problem-solving and communication skills * Desire to mentor others and develop into a recognised technical leader Key requirements *

Requirements

Provide technical leadership and mentoring to junior engineers and foster collaborative culture * Collaborate with Verification to deliver first-pass silicon success via robust verification and ISO 26262 compliance Tasks * 5-6+ years in Digital IC Design or SoC Architecture * Strong RTL design experience with Verilog or SystemVerilog * Experience designing complex digital IP, SoCs or CPU subsystems * Knowledge of on-chip interconnects such as AMBA/AXI * Solid understanding of the full digital design flow from architecture to tapeout * Excellent problem-solving and communication skills * Desire to mentor others and develop into a recognised technical leader Key requirements *

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