Senior Fpga Engineer (Systemverilog) - Barcelona Hybrid

Vivid Resourcing

Barcelona, Spain

about 2 months ago

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Role details

Contract type

Permanent contract

Employment type

Full-time (> 32 hours)

Working hours

Regular working hours

Job source

www.buscojobs.com.es

Tech stack

Field-Programmable Gate Array (FPGA) SystemVerilog Verilog Application Specific Integrated Circuits Fpga Hardware

Job description

Vivid Resourcing seeks a senior freelance FPGA Development Engineer in Barcelona to design and implement SystemVerilog FPGA functionality for synchronization and instrumentation platforms.This hands?on role focuses on multi?FPGA systems rather than ASIC design, working with a global R&D team.The right candidate has deep FPGA experience, strong Verilog/SystemVerilog design skills, and a solid grasp of CDC, timing, and verification.#J-*****-Ljbffr

Requirements

This hands?on role focuses on multi?FPGA systems rather than ASIC design, working with a global R&D team. The right candidate has deep FPGA experience, strong Verilog/SystemVerilog design skills, and a solid grasp of CDC, timing, and verification. #J-*****-Ljbffr

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