Senior Fpga Engineer (Systemverilog) - Barcelona Hybrid
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Job description
Vivid Resourcing seeks a senior freelance FPGA Development Engineer in Barcelona to design and implement SystemVerilog FPGA functionality for synchronization and instrumentation platforms.This hands?on role focuses on multi?FPGA systems rather than ASIC design, working with a global R&D team.The right candidate has deep FPGA experience, strong Verilog/SystemVerilog design skills, and a solid grasp of CDC, timing, and verification.#J-*****-Ljbffr
Requirements
This hands?on role focuses on multi?FPGA systems rather than ASIC design, working with a global R&D team. The right candidate has deep FPGA experience, strong Verilog/SystemVerilog design skills, and a solid grasp of CDC, timing, and verification. #J-*****-Ljbffr
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