Sr. Director, Pre-Si System Validation, Data Center GPU Products

The Sr. Director, Pre-Si System Validation leads AMD’s system-level modeling - including emulation - and pre-silicon validation for Data Center GPU platforms. This role ensures early, system-accurate insights across AI, HPC, and cloud-scale environments, accelerating software readiness, reducing integration risk, and enabling end-to-end HW/SW co-design. It drives holistic evaluation of GPU SoCs, platforms, and rack-scale systems ahead of silicon availability.

Operating at the center of DCGPU execution, the individual partners with architecture, silicon, systems, software, performance, and customer teams, while engaging senior leadership and key customers.

THE PERSON:

The role owns the end-to-end pre-silicon validation strategy, infrastructure, methodology, and execution across AMD’s Instinct GPUs, ROCm platform, and broader compute ecosystem, with direct interface to executive, CTO, and BU leadership.

Ability to translate complex technical insights into clear, executive-level recommendations.

• Track record of operating effectively in fast-paced, high-stakes, and ambiguous environments.

• Exceptional communication, influence, and executive presence in cross-functional and external-facing environments., System-Level Pre-Si Strategy & Ownership

• Own the system-level validation strategy and roadmap for Data Center GPU platforms across pre- and post-silicon.

• Establish emulation as a core DCGPU execution capability, accelerating architectural confidence, software bring-up, and risk reduction.

• Drive investment and prioritization of emulation infrastructure, tooling, and methodologies aligned to DCGPU scale and timelines.

AI, HPC, and Platform-Scale Enablement

• Lead simulation and emulation of GPU SoCs, multi-die architectures, and full system platforms for AI training, inference, and HPC workloads.

• Enable rack-, pod-, and cluster-level exploration, spanning memory hierarchy, interconnects/fabrics, IO, and platform interactions.

• Partner with architecture and performance teams to deliver early system-scale performance, power, and scalability insights.

HW/SW Co-Design & Software Readiness

• Drive shift-left HW/SW co-design through high-fidelity modeling including emulation, enabling early access for firmware, drivers, runtime, compilers, and frameworks.

• Integrate emulation into software development and validation flows to improve predictability and time-to-value.

• Correlate emulation results with workload behavior and performance targets in partnership with performance teams.

Cross-Functional & Executive Engagement

• Serve as the executive owner for system-level emulation in architecture, program, and executive reviews.

• Partner with platform solutions and customer engineering to ensure system readiness for hyperscalers, CSPs, and enterprise customers.

• Represent AMD in strategic customer and partner engagements where system-level validation is a key differentiator.

Execution, Talent, and Organizational Leadership

• Build and lead a world-class system-level emulation organization, including senior architects and people leaders.

• Establish technical standards, best practices, and governance across emulation, simulation, and hybrid modeling.

• Mentor senior technical leaders, strengthening AMD’s long-term system modeling and emulation bench., AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

• Proven leadership of large, multi-disciplinary teams at Sr. Director/VP level

• Deep expertise in system-level modeling, simulation, and emulation

• Strong knowledge of AI/HPC workloads, GPU architectures, memory, and interconnects

• Experience in HW/SW co-design, workload-driven architecture, and performance modeling

• Ability to translate complex technical insights into clear executive decisions

ACADEMIC CREDENTIALS:

Advanced degree in Computer Science, Electrical Engineering, or a related field.

$268,640.00/Yr.-$402,960.00/Yr.

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