SoC Product Architect, Memory Ecosystem

NVIDIA Corporation
Santa Clara, CA, United States
8 days ago
Apply on nvidia.wd5.myworkdayjobs.com
Prepare application

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Compensation
$320,000.0
Working hours
Regular working hours

Tech stack

Artificial Intelligence Computer Engineering Data Centers Dynamic Random-Access Memory Flash Memory Non-Volatile Memory Signal Integrity Graphics Processing Unit (GPU) Low Latency Data Analytics

Job description

NVIDIA’s SoC Product Architecture team defines the platforms that power AI, graphics, and accelerated computing across data center, automotive, client, and edge products. As a Senior SoC Product Architect, Memory Ecosystem, you will drive NVIDIA’s external memory ecosystem across DRAM and non-volatile flash, working with major memory vendors to align roadmaps, co-innovate new technologies, and ensure our SoC portfolio delivers industry-leading bandwidth, latency, power, and cost.

What you’ll be doing:

  • Partner with all major memory vendors to understand their technology and product roadmaps (e.g., DDR/LPDDR, GDDR, HBM, NAND, emerging NVM) and align them with NVIDIA’s SoC and platform roadmaps.
  • Steer vendor roadmaps by articulating NVIDIA’s performance, power, capacity, form-factor, and reliability requirements, translating SoC and system needs into clear, data-driven feedback and requests.
  • Innovate new DRAM solutions in collaboration with vendors, exploring novel architectures, signaling, packaging, and power-management techniques to meet the bandwidth, latency, and power requirements of future NVIDIA SoCs and systems.
  • Work closely with SoC architects, memory controller designers, and board/system teams to co-optimize SoC + memory subsystem architecture, including channel topologies, speed grades, rank/stack configurations, and error-management strategies.
  • Represent NVIDIA at regular vendor technical reviews and key technical/roadmap meetings, presenting consolidated SoC roadmap needs, performance data, and proposals, and driving clear follow-ups and decisions.
  • Collaborate with sourcing, operations, substrate and PCB design, and quality teams to factor supply, cost, and reliability considerations into memory technology choices and long-term ecosystem strategy.

Requirements

  • MS in Electrical Engineering, Computer Engineering, Physics, or related field, or equivalent experience.
  • 18+ years of experience in DRAM / memory subsystem architecture, SoC or memory controller design, or closely related roles in semiconductor or system companies. Deep understanding of modern DRAM technologies (e.g., DDR, LPDDR, GDDR, HBM) and non-volatile memories (e.g., NAND flash, managed NAND/SSD), including key tradeoffs in bandwidth, latency, power, capacity, packaging, and reliability.
  • Proven experience working directly with memory vendors on product definition, bring-up, or co-development, and familiarity with how large-scale customers influence vendor roadmaps.
  • Solid background in SoC and system memory subsystems, including memory controllers, PHYs, signal integrity, power delivery, and how memory choices impact overall SoC and platform performance and power.
  • Demonstrated ability to perform competitive analysis, including interpreting teardown data, benchmarking memory bandwidth/latency, and drawing clear architectural conclusions and recommendations.
  • Strong communication and presentation skills, with experience representing technical positions in vendor meetings, technical reviews, and multi-functional internal reviews. Ability to work across functions (architecture, design, systems, sourcing, operations) and regions, driving alignment and decisions without direct authority.

Ways to stand out from the crowd:

  • Direct experience defining or architecting HBM, GDDR, or high-speed LPDDR solutions for GPUs, AI accelerators, or high-performance SoCs.
  • Hands-on work with advanced packaging (e.g., 2.5D/3D, CoWoS, multi-chip modules) involving high-bandwidth memory interfaces.
  • Prior ownership of memory-related driven teardowns or benchmarking programs, with clear examples of how results influenced product or technology direction.
  • Established relationships with major memory vendors and a history of successful roadmap or co-development engagements.

Benefits & conditions

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 320,000 USD - 488,750 USD.

About the company

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you’re creative and autonomous, we want to hear from you!

Apply for this position

This job is hosted externally. Click below to view the full posting and apply.

Apply on nvidia.wd5.myworkdayjobs.com
Prepare application

Good distractions

Talks and stories from around this role — technically off-topic, practically not.

53 sec

Storing charge in MOSFETs for flash memory

Eli (they/them) Eli (they/them) · World Congress 2024

51 sec

Repurposing hardware and operating underwater data centers

Chris Heilmann +1 · LIVE

5:48 min

Balancing delivery latency with stream reliability and scale

Phil Cluff · LIVE

1:12 min

Addressing the competitive landscape of specialized hardware demands

Hazal Mestci +1 · Coffee With Developers

4:03 min

Managing massive power consumption scaling in AI data centers

Stephan Gillich Stephan Gillich +3 · World Congress 2024

4:54 min

NVIDIA local and edge AI hardware capabilities overview

Joerg Krall Joerg Krall · World Congress 2026 Europe

Videos

See all

Related articles

See all