Flight Software Engineer - Space Segment

• Build and test cFS applications on the payload OBC: cFE Software Bus, tables, scheduler, SB/TBL/EVS, and the CCSDS PUS TM/TC service set including time-tagged commands.
• Port and maintain the platform abstraction layer across RTEMS and VxWorks on LEON3 and Xiphos Q8S-class hardware, keeping execution deterministic inside the agreed CPU, memory and power budget.
• Implement the optical terminal and S-band transceiver interfaces: contact-schedule execution, link-mode switching, safe-state recovery after an OBC reset.
• Stand up and run the HIL bench with flight-representative hardware, and drive the SIL to HIL verification loop against the digital twin.
• Produce ECSS-aligned software documentation, test evidence, and requirement-to-verification traceability.
• Support PDR, CDR and QR reviews and the AIT campaign with satellite bus providers and payload suppliers.

• C. Current, production-grade embedded C on real-time targets. MISRA C or equivalent, static analysis, deterministic memory use with no dynamic allocation after init, volatile and memory-barrier semantics, bit-level register and packet work, and reading a linker script and map file without flinching. cFS is C.
• Python. Test harnesses, ground-side tooling, telemetry decoding, log analysis, CI. pytest, binary parsing with struct or construct, NumPy or pandas for post-processing HIL and twin runs.
• Build and debug toolchain. Make and CMake, cross-compilation for SPARC (sparc-rtems / BCC) and ARM, GCC and Clang, GDB and JTAG-level debugging, Git with disciplined branching and review.

Desirable

• Rust. Ground-segment services, twin components, control-plane tooling. Not going on the flight target in this phase.
• Bash and YAML. Shell scripting, CI pipelines, infrastructure-as-code for the test and simulation environment.
• VHDL or Verilog, reading level. OBC and interface-board bring-up, FPGA-adjacent debugging, * Masters degree in computer science, electronics, aerospace or similar, or equivalent experience.
• Three or more years experience in embedded software for real-time, safety-critical or space systems, with cFS or cFE delivery you can point to.
• Software taken through a formal review chain (PDR/CDR or equivalent) and into integration or flight.
• Comfortable working to a documented process without needing it explained, and comfortable pushing back when the process and the engineering disagree.
• Excellent communication skills in English; German language skills are a plus

Nice to have

• Optical terminal, laser communication or SDR integration.
• LEON/SPARC or ARM Cortex-R bring-up.
• Prior ESA or DLR programme work.
• Orbit and network simulation tooling: Orekit, GMAT, ns-3 or similar.

You’ll join a company where your work has visible impact from day one. You’ll work directly with world-class engineers, scientists, aerospace experts and entrepreneurs building technologies that have never existed before. Every day you’ll collaborate with people who genuinely believe Europe can lead the next generation of autonomous intelligence. We’re not maintaining legacy systems. We’re creating the infrastructure future generations will depend on.

What We Offer Competitive Compensation Personal Development Lunch Support Modern Aerospace Campus

Join Us If you’re ready to build technology that could shape Europe for decades to come, we’d love to meet you.