Lead Embedded Firmware Engineer

You will own firmware for our wearable’s distributed-compute platform, including media/connectivity, biosignal acquisition, and always-on power/privacy control MCUs.

• Lead/Architect firmware across the distributed-compute platform: RTOS choice, task structure, inter-processor protocols, OTA, and time sync.
• Own the runtime that hosts every subsystem, audio DSP, camera capture pipeline, biopotential acquisition, through specified interfaces with each subsystem lead.
• Own the media and connectivity MCU pipeline, camera capture, audio runtime, wake-word, Wi-Fi streaming, and onboard logging, concurrently within strict CPU and memory budgets.
• Drive low-power firmware on the always-on MCU: state machines for standby, assist, and continuous modes; hardware-enforced privacy; thermal throttling.
• Build the multi-MCU time-sync layer that lets us correlate EEG, audio, and camera data downstream.
• Establish the firmware engineering practices that scale: build and release pipelines, on-device telemetry, automated test, OTA with safe rollback, field debug tooling.
• Partner with the EE lead on hardware bring-up and boot path; with the reliability lead on field telemetry, error handling, and diagnostic surfaces.
• Bring up ASICs in collaboration with the EE and silicon teams
• Ship the product by the end of year and build and lead the firmware team as we scale to production.

• 10+ years of embedded firmware engineering, with at least one shipped consumer product where you owned firmware architecture end-to-end.
• Deep expertise across embedded RTOSes and bare-metal ARM Cortex-M, with familiarity across at least two ecosystems (e.g., Zephyr, FreeRTOS, ESP-IDF, ThreadX, NuttX).
• Hands-on experience hosting real-time DSP runtimes alongside wireless connectivity on resource-constrained MCUs - integrating algorithms owned by other teams.
• Strong background in multi-radio coexistence (Wi-Fi + BLE), low-power state-machine design, and OTA with safe rollback.
• Comfortable in the lab with JTAG/SWD, logic analyzers, and protocol sniffers - able to drive bring-up from first power-on through end-to-end functional demos.

Preferred Skills:

• Deploying neural network inference to low-power MCUs or dedicated AI accelerators - model conversion, quantization, runtime integration.
• Familiarity with on-device inference frameworks and edge AI runtimes.
• Custom AI accelerator silicon, neuromorphic compute, or in-memory-compute platforms.
• On-device wake-word or always-on voice activation engines.
• Integrating biopotential acquisition over standard sensor buses.