Sr. FPGA Engineer

iVeia, Inc.
Baltimore, MD, United States
about 1 month ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Compensation
$140,000.0 - $190,000.0
Working hours
Shift work
Job source

Tech stack

Board Bringup Artificial Intelligence Code Review Computer Programming Image Analysis Software Debugging Field-Programmable Gate Array (FPGA) Hardware Description Language Hardware Design Signal Processing System on a Chip Loadable Kernel Module
+4 more
Scripting Fpga Hardware Information Technology Performance Monitor

Job description

iVeia is a growing leader in high-performance edge computing products and solutions for industrial, medical, automotive, defense, and IoT markets. iVeia is seeking an experienced Programmable Logic/FPGA Engineer who will be responsible for architecting, developing, implementing, and supporting the company’s FPGA-based vision processing, signal processing, and AI products and projects. In iVeia’s small company environment, the engineer will work directly with all levels of management and have a direct impact on the success of the company and its customers. The ideal candidate will be technically adept, enthusiastic, flexible, and enjoy working in a high-tech, fast-paced environment. The position is 80% remote, and 20% on-site. For the right candidate, a fully remote position may be considered., * Architecting, coding, debugging, and maintaining a diverse array of high-performance FPGA and programmable SoC applications using HDL and high-level synthesis

  • Develop system-level architectures based on FPGAs/programmable SoCs and work with management and customers to develop and refine such architectures
  • Provide technical leadership on projects and serve as liaison between engineering and management/customers
  • Write and review specifications, design, and verification documents
  • Formulate methodologies for evaluating FPGA-based solutions, in terms of performance, power, resources, and cost
  • Implement necessary tools/libraries/framework for heterogeneous programming, performance monitoring, and performance analysis
  • Model algorithms and develop FPGA-based implementation strategies for algorithms given resource, power, and cost constraints
  • Develop FPGA design specifications and requirements, tasking for design completion, and level of effort estimates. Track progress and schedule commitments, ensure quality, and identify any risk or issue areas
  • Participate in hardware design, FPGA integration, and board bring-up and validation of new hardware projects
  • Develop plans and strategies for on-boarding new programmable SoC technologies
  • Participate in code reviews and product planning sessions
  • Develop C-code to test processor-to-FPGA interfaces and follow-on hardware

Requirements

  • Excels in HDL design, coding, implementation, timing closure, and debugging
  • Deep understanding of FPGA design considerations including synchronous and asynchronous timing requirements and FPGA resource utilization => This would be unusual for and FPGA enginer
  • Experience in developing/coding for heterogeneous computing architectures (mixed FPGA and processor), particularly programmable SoCs
  • Proficient in FPGA and programmable SoC design and implementation flows and tools, simulation tools, and logic debugging tools
  • Strong knowledge of FPGA internal architectures, including processor interfaces (AXI), high-speed communication interfaces, memories and memory interfaces, and logic block architecture
  • Strong knowledge of Digital Signal Processing (DSP) techniques/implementations, high-speed data path processing, and targeting SoC resources for processing large volumes of IQ data efficiently
  • Excels at analyzing timing issues and utilizing techniques for achieving timing closure
  • Adept at verification methodologies, including developing test benches and interfacing stimulus and response data with signal and image analysis tools
  • Experience with memory mapped I/O and Linux kernel module development
  • Experience with scripting languages for tool automation and for FPGA validation
  • Bachelor degree in electrical engineering, computer science or similar
  • Must be a team player with strong communication skills
  • Must be a US citizen or permanent resident, * Are you looking for a full time position, not a contractor/consulting position?
  • Do you have 5+ years experience in FPGA development?
  • Are you a US Citizen or permanent resident?

Benefits & conditions

5.05.0 out of 5 stars Canton, MD Hybrid work $140,000 - $190,000 a year - Full-time, Pulled from the full job description

  • 401(k)
  • Health insurance
  • Paid time off
  • Vision insurance
  • Health savings account
  • Dental insurance
  • Flexible schedule, iVeia provides competitive salaries and excellent benefits. iVeia operates on a 9-80 schedule (every other Friday off) with flexible work hours that accommodate a healthy work-life balance.

Job Type: Full-time

Pay: $140,000.00 - $190,000.00 per year, * 401(k)

  • Dental insurance
  • Health insurance
  • Health savings account
  • Paid time off
  • Vision insurance

About the company

iVeia’s main office is located on the waterfront in the neighborhood of Canton in Baltimore, Maryland. Canton is a beautiful, family-friendly community with parks, restaurants, housing, and shops all within a short walk from the office.

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