Engineer, Performance Infrastructure
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Role details
Tech stack
Job description
- Join a team driving improvements in CPU microarchitecture, verifying performance, and correlating results between RTL and the performance model.
- Enhance the design environment, tools, and methodologies to improve development efficiency.
- Own the performance correlation framework, including tracking, visualization, and analysis tools.
- Collaborate closely with RTL engineers and core architects to meet performance goals, debug miscorrelation, and verify performance features.
- Use innovative techniques to optimize power, performance, and area while driving performance experiments and evaluating results.
Requirements
- Strong problem solver who can identify complex issues, develop practical solutions, and drive them through implementation.
- Enjoy building tools and improving the infrastructure, workflows, and methodologies that make CPU development more efficient.
- Skilled in C++ and Python, with experience using industry-standard compilation, simulation, and emulation tools.
- Experience with verification infrastructure and methodologies along with knowledge of high-performance CPU architecture and microarchitecture.
- Proficient in debugging RTL and logic across multiple design hierarchies and pre-silicon environments., * Hands-on experience with performance models, correlation, and analysis across pre-silicon and post-silicon phases.
- Experience integrating open-source and industry-standard tools to improve design flows and results.
- How to work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.
Benefits & conditions
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country.
About the company
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design.
This role is hybrid, based out of Austin, TX or Santa Clara, CA.
We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
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