Chicago's Elite Low-Latency C++ Engineering Talent

We are looking for an Elite Trading Systems Developer to own, optimize, and scale our core electronic execution pipeline. You will write deterministic, hardware-aware C++ code responsible for executing millions of daily orders across global derivatives exchanges., Trading Systems Developer to design, build, and optimize our next-generation electronic trading infrastructure. You will engineering ultra-low latency software that handles millions of orders daily. This role sits at the intersection of high-performance computing and competitive financial markets. Core Responsibilities Optimize Latency: Minimize system microsecond delays in the automated trading pipeline. Build Architecture: Code robust, deterministic, and concurrent order execution systems. Integrate Venues: Develop low-latency market data feeds and exchange connectivity gateways. Enhance Tools: Create internal performance profiling and real-time monitoring utilities. Collaborate Daily: Partner closely with quantitative researchers to productionize complex alpha strategies. Required Technical Skills Expert C++: Advanced proficiency in C++17/20, including template metaprogramming and STL. Low-Level Systems: Deep knowledge of Linux kernel tuning, OS internals, and CPU architecture.

Concurrency: Mastery of lock-free data structures, multi-threading, and memory models. Networking Hardware: Experience with TCP/IP, UDP, sockets, and kernel-bypass tech (e.g., Solarflare EF_VI).Hardware Acceleration: Familiarity with FPGA development (Verilog/VHDL) is highly advantageous. Qualifications & Experience Education: Bachelor’s or Master’s in Computer Science, Computer Engineering, or Physics. Track Record: Minimum 5+ years building high-frequency trading (HFT) or market-making systems. Mindset: Obsession with clean code, memory management, and hardware-level optimization., C++ Programming Language, C++ Standard Template Library (STL), CPU (Central Processing Unit), Computer Engineering, Computer Science, Concurrency, Data Structures, FPGA, Kernel Programming, Legal, Linux Kernel, Memory Hardware, Metaprogramming, Multithreaded Programming, Network System Hardware, Operating Systems, Physics, Quantitative Research, Sockets, Software Engineering, Stock Market, System Architecture, System Integration (SI), Systems Engineering, TCP/IP (Transmission Control Protocol/Internet Protocol), Technical Strategy, Time Tracking, Trading Systems, UDP (User Datagram Protocol), VHDL Hardware Description Language, Verilog Hardware Description Language

Salary: $275,000 - $450,000 per year

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Company Size: 100 to 499 employees