ADCE Packaging Design Architect
- Discuss this with your agent
- Open in Claude
- Open in ChatGPT
Prepare application
- Draft this with your agent
- Open in Claude
- Open in ChatGPT
Role details
Tech stack
Job description
Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design. Completes documentation and collateral into the product lifecycle management system of record.
Requirements
- Self-motivated engineer who has strong technical background in design and electrical analysis.
- Solid background in semiconductor fabrication and packaging
- Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions. - Ability to work independently and at various levels of abstraction
- Strong organization, time management, and communication skills, self-motivated.
- Experience with design and electromagnetic simulation tools: Mentor, Cadence tools, SPICE, Ansys tools etc.
- Experience in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity), and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx).
- Experience and knowledge with assembly process, test and characterization techniques preferred
Qualifications:
- Ph.D./master’s in electrical engineering/ chemical engineering/ mechanical engineering or Material Science.
- 10+ years and in-depth knowledge/background in Package, PCB design, or IC digital design.
Benefits & conditions
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel (https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003) .
Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD
Apply for this position
This job is hosted externally. Click below to view the full posting and apply.
Prepare application
- Draft this with your agent
- Open in Claude
- Open in ChatGPT
Good distractions
Talks and stories from around this role — technically off-topic, practically not.
Moments
Explore playlistsVideos
See allRelated articles
See all
Dev Digest 188: CfP time, the risks of NPM and IKEA algorithms
Dev Digest 212: WebMCP or MCP, What is DevRel, AI's 10% Productivity Boost, and a 49MB Web Page…
How We Built a Worry-Free System That Runs for 10+ Years – And What We’d Do Again
Dev Digest 121 - AI goes offline