Hardware Principal Engineer

From schematic symbol to Printed Circuit Board (PCB) footprint, the Electrical Computer-Aided Design (ECAD) Library team is the foundation upon which every hardware design is built. It’s a critical field of work. We’re involved in interpreting component specifications, translating manufacturer data into accurate and reliable library parts, and ensuring that every design team across the organization has access to the highest-quality ECAD assets. We establish and enforce the standards that ensure consistency, accuracy, and efficiency across platforms. Our work influences design quality from the earliest stages of schematic capture through final PCB layout. And we partner with colleagues across hardware engineering, component engineering, and supply chain to ensure our library ecosystem keeps pace with the latest silicon and packaging technologies., Dell Technologies is seeking a Senior ECAD Library Engineer to join our Hardware Engineering organization, where precision meets innovation. This role is ideal for a detail-driven engineer who takes pride in building the foundational assets that enable world-class hardware design and who thrives on enabling high-performing design teams to move faster with confidence.

What you’ll achieve:

As a ECAD Library Engineer, you’ll own the creation, management, and governance of electronic component libraries within the Cadence Allegro/OrCAD toolset, supporting next-generation laptop, desktop, workstation, and server platforms. You’ll drive library standards, automation, and quality processes, ensuring design teams have access to accurate, validated schematic symbols, PCB footprints, padstacks, and associated component data throughout all phases of product development.

You’ll also collaborate closely with schematic designers, PCB layout engineers, signal integrity engineers, component engineers, and supply chain teams to anticipate library needs, resolve part-related design issues, and maintain alignment between ECAD libraries, approved vendor lists, and PLM systems.

You will:

• Create and maintain schematic symbols, PCB footprints, and padstacks in Cadence Allegro/OrCAD, ensuring compliance with IPC-7351, JEDEC, and internal design standards for complex package types, including BGAs, QFNs, and multi-die modules
• Establish and govern library standards, including naming conventions, version control, and release processes, to ensure consistency, traceability, and quality across engineering platforms
• Develop and implement automation solutions using SKILL, Python, and Tcl to improve library creation, validation, maintenance, and bulk-update efficiency
• Manage Cadence library infrastructure and support integration with PLM/ERP systems to align component data with lifecycle management and approved vendor requirements
• Collaborate with engineering teams to deliver validated library components ahead of design milestones while providing training, documentation, and best-practice guidance on library usage and standards

• Strong proficiency with the Cadence Allegro/OrCAD toolset, including symbol editor, padstack editor, and package designer
• Deep working knowledge of IPC-7351 land pattern standards, JEDEC package outlines, and component datasheet interpretation
• Experience building library parts for advanced packaging technologies including fine-pitch BGAs, QFNs, and high-density connectors
• Familiarity with PLM systems, component lifecycle management workflows, and database-driven library management
• Attention to detail with a demonstrated commitment to data accuracy, quality, and process discipline

Desirable Requirements:

• Typically requires 8+ years of related experience in a professional role with a Bachelor’s degree; or 6+ years with a Master’s degree; or 3+ years with a PhD; or equivalent experience
• Experience in ECAD library development for high-volume notebook, server, and client hardware environments, leveraging Cadence SKILL, Python, and Tcl for library automation, supporting ECAD-MCAD collaboration and 3D component modeling, incorporating signal integrity considerations into footprint and padstack design, and utilizing third-party library data sources and tools such as IHS, SiliconExpert, and Ultra Librarian while collaborating with global engineering teams and ODM partners

Dell is committed to fair and equitable compensation practices. The salary range for this position is $161,500 - $209,000.

The reputation of Dell Technologies for delivering award-winning hardware is legendary and our Hardware Engineering team is at the heart of it. We design and develop analogue as well as digital hardware products - not just computer or network hardware devices but peripherals too. Recognized for our high level of technical expertise in a variety of engineering disciplines, we’re involved across the development lifecycle - from research to the building, testing and delivery of completed products. Innovators in our field, we lead the way in exploring new concepts, approaches, processes, materials and components.