CPU Performance Modeling Architect

• Gain deeper exposure to the full CPU architecture and development process, from early architectural exploration through implementation and silicon.
• Expand your ability to connect performance models and workload behavior to real hardware design decisions.
• Work across CPU architecture, software, compilers, and system teams to understand performance from multiple perspectives.
• Develop new approaches to modeling, workload analysis, and architectural exploration as processor designs become increasingly complex.
• Help shape the performance characteristics and architectural direction of future generations of Tenstorrent CPUs.

• A CPU architect, performance architect, or performance modeling engineer with experience influencing CPU architecture or microarchitecture decisions.
• You have a strong understanding of modern processor architecture and enjoy digging into why a CPU performs the way it does.
• You are comfortable combining hardware architecture, software, data, and analytical modeling to solve complex performance problems.
• You can move between high-level architectural questions and detailed analysis of CPU pipelines, memory systems, workloads, and bottlenecks.
• A strong collaborator and technical communicator who can turn complex modeling results into clear recommendations and drive decisions across engineering teams.

What We Need

• 8+ years of experience in CPU architecture, performance modeling, microarchitecture, performance analysis, or a closely related field.
• Strong understanding of CPU architecture and microarchitecture, including areas such as pipelines, execution, scheduling, branch prediction, caches, memory hierarchy, and data movement.
• Demonstrated experience using performance models, simulation, or quantitative analysis to guide real architectural decisions.
• Strong programming skills in C++, Python, or similar languages, with experience developing or extending modeling and analysis tools.
• Strong analytical, problem-solving, and communication skills, with the ability to work effectively across architecture, hardware, and software teams.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is building next-generation processors and systems, bringing together world-class expertise across silicon, systems, and software. We are looking for a CPU Performance Modeling Architect to help evaluate, shape, and optimize the performance of future CPU architectures. In this role, you’ll use performance modeling, workload analysis, and deep understanding of CPU architecture to answer complex questions about how a processor should be designed. You’ll work closely with CPU architects, RTL designers, software and compiler teams, and system engineers to identify performance opportunities, evaluate architectural tradeoffs, and turn modeling insights into actionable design decisions.

This role is hybrid, based out of Santa Clara, CA or Austin, TX.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.