• Degree in Electrical Engineering, Microelectronics, Physics, Computational Engineering, Mechanical Engineering, or a related technical discipline
• At least 4 years of professional experience in semiconductor package development, simulation, design methodologies, EDA environments, or related engineering fields
• Strong background in electromagnetic, thermal or multiphysics simulation for semiconductor package and system development
• Hands-on experience with industry-standard simulation environments such as Synopsys/Ansys, Cadence, Siemens, Keysight, COMSOL, or comparable engineering platforms
• Proven track record in developing, optimizing, and deploying simulation methodologies, engineering workflows, and design environments
• Solid knowledge of Linux and one or several of the following programming languages: Python, bash, MATLAB, Perl, skill
• Strong analytical and problem-solving skills combined with excellent communication abilities and a customer-oriented mindset
• Experience with development and integration of Machine Learning (ML) and Artificial Intelligence (AI) tools for design or simulation is an advantage
• Fluent English skills are required; German language skills are considered as an advantage

• Develop and support simulation methodologies, design flows, and tool environments for Chip-Package-Board (CPB) Co-Design and advanced package development in Linux-based HPC environment
• Drive and continuously improve methodologies for electromagnetic, thermal and multiphysics analysis supporting semiconductor package and system development
• Own and maintain the simulation environment within the CPB Co-Design Flow & Methodology team and provide consulting and support to product development projects worldwide
• Enable simulation-driven design and verification for advanced packaging technologies including System-in-Package (SiP), heterogeneous integration, and 2.5D/3D package solutions
• Collaborate closely with Business Lines, Design Systems, package development teams, and external technology partners to address simulation requirements and develop best-in-class engineering solutions
• Drive technology evaluations, benchmarks, automation initiatives, and knowledge sharing activities to continuously improve simulation capabilities and engineering productivity, The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G (https://www.feei.at/aktuelles/mindestloehne-und-gehaelter-eei/). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.

Contact:

Maria Pollai-Schlintl, LinkedIn

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Join the thinkers, builders, and problem-solvers behind tomorrow’s technology. As a Staff Engineer Simulation and Package Design Methodology on our Research & Development team, you’ll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.