Advanced ASIC FPGA Engineer

General Dynamics Mission Systems, Inc.
Boise, ID, United States
6 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Experienced
Experience required
3 years minimum
Compensation
$133,000.0
Working hours
Shift work
Job source

Tech stack

Artificial Intelligence C++ (Programming Language) Cyber Security Computer Engineering Embedded C Field-Programmable Gate Array (FPGA) High-Level Architecture PCI Express Reverse Engineering Reduced Instruction Set Computing Technical Data Management Systems Verilog
+7 more
VHSIC Hardware Description Language (VHDL) Vivado Application Specific Integrated Circuits Fpga Hardware Information Technology Modeling and Simulation Physical Design

Job description

Role and Position Objectives As an ASIC/FPGA Engineer for our Idaho Scientific group, you will be a member of a cross-functional team responsible for designing and deploying secure system solutions. You will contribute to FPGA design, simulation, verification, and documentation efforts that support secure, mission-critical products., Create test and simulation plans that establish functional criteria. Define module interfaces and all aspects of device design and simulation. Determine architecture, system simulation, and detailed design approaches for assigned work. Evaluate the FPGA development flow, including high-level design, synthesis, place and route, timing, and power or resource utilization. Verify test results, analyze performance, and document designs and results. Research and analyze customer specifications, proposals, technical data, and manuals to determine design or application feasibility. Review relevant vendor capabilities, device libraries, and simulation tools; recommend components and technologies based on specifications, reliability, and program needs. Generate technical engineering products using established standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle. Contribute to major programs and projects and improve ASIC/FPGA engineering processes.

Requirements

Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master’s degree plus a minimum of 3 years of relevant experience., Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required., Fully proficient written and verbal communication skills, including the ability to clearly report information relevant to sound ASIC/FPGA design decisions. Fully proficient knowledge of ASIC/FPGA engineering processes, concepts, principles, and design tools, with a strong understanding of related engineering disciplines. Ability to grasp and apply new information quickly, multi-task, and think creatively when solving complex technical problems. Keeps current with relevant ASIC/FPGA technology trends and identifies appropriate opportunities to apply AI for continuous improvement and innovation. Ability to communicate issues, impacts, and corrective actions and to manage technical scope with project leaders, internal work groups, customers, and vendors., Ability to obtain and maintain a security clearance. Degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field. Ability to clearly capture complex technical concepts in writing for both technical and general audiences. Strong analytical and problem-solving skills. Proven FPGA RTL development experience with a strong body of work in VHDL or Verilog development. Fluent in VHDL or Verilog hardware description languages. Fluent in embedded C or C++ programming. Experience developing test bench simulations. Experience with Xilinx Vivado and/or Altera Quartus software. Strong understanding of computer architecture., Active U.S. security clearance. Working knowledge of applied cryptography. Experience applying principles of cybersecurity to operational technology and embedded systems. Experience reverse engineering hardware and software. Knowledge of the secure boot process. Experience developing RISC-V or other CPU microarchitectures. Experience with PCI Express or DDR controllers.

Benefits & conditions

Research oriented work, alongside award winning teams developing practical solutions for our nation’s security Flexible schedules with every other Friday off work, if desired (9/80 schedule) Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more See more at gdmissionsystems.com/careers/why-work-for-benefits

About the company

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!

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