RTL Design Engineer, Interconnect & Memory Systems

The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI inference chips tailored to accelerate Tesla’s machine learning capabilities. A key part of this effort is Dojo, Tesla’s custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Tesla’s AI Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance. By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life.The Tesla AI Hardware team is looking for an ASIC RTL Design Engineer specializing in interconnect and memory systems to drive the development of next-generation AI accelerators. In this role, you will focus on the critical data path elements of custom ASICs, including Network on Chip (NoC) architectures, DMA engines, memory controllers, Memory Management Units (MMUs), arbiters, and AXI protocol implementations. You will collaborate closely with system architects, verification engineers, physical design teams, and software/firmware developers to deliver high-performance, power-efficient designs that enable massive-scale AI training and inference. This position is based in Palo Alto, CA, or Austin, TX and offers the opportunity to work on cutting-edge hardware that powers Tesla’s autonomous driving and AI initiatives.Architect, design, and implement RTL (Verilog/SystemVerilog) for high-performance interconnect and memory subsystems, including NoC topologies, DMA controllers, and AXI-based data paths optimized for AI workloadsDevelop and document microarchitecture specifications for memory controllers, MMUs, and arbiters to ensure low-latency, high-bandwidth data movement across SoC componentsDefine system-level functional requirements for SoC data paths, focusing on throughput, scalability, and integration with compute acceleratorsPerform design analysis, including timing closure, power optimization, and area efficiency, for high-performance memory and interconnect blocksCollaborate with cross-functional teams to integrate interconnect IP into full-chip designs, debug issues, and support silicon bring-up and validationContribute to performance modeling and simulation of data path elements to meet aggressive AI hardware metricsStay abreast of industry trends in high-performance ASIC design and propose innovations for interconnect and memory efficiencyDegree in Electrical Engineering, Computer Science, or equivalent experience3+ years of hands-on RTL design experience in SoC interconnect, memory systems, or data path components for custom ASICsStrong proficiency in Verilog or SystemVerilog for complex digital designSolid understanding of AXI protocol and high-performance design techniques (e.g., pipelining, clock domain crossing)Experience with synthesis, timing analysis, and linting tools (e.g., Synopsys Design Compiler, SpyGlass)Ability to work in a fast-paced, collaborative environment with strong problem-solving skillsProven track record in Network on Chip (NoC) design, including topology selection, routing algorithms, and QoS mechanismsDeep expertise in DMA engine design, memory controller architectures (e.g., DDR/LPDDR interfaces), MMUs, and priority arbiters for multi-master systemsExperience with high-performance SoC data path optimization for AI/ML accelerators or HPC applicationsFamiliarity with verification methodologies (e.g., UVM) and scripting (Python/Perl) for automationBenefitsAlong with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire:Medical plans > plan options with $0 payroll deductionFamily-building, fertility, adoption and surrogacy benefitsDental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contributionCompany Paid (Health Savings Accounts) HSA Contribution when enrolled in the High-Deductible medical plan with HSAHealthcare and Dependent Care Flexible Spending Accounts (FSA)401(k) with employer match, Employee Stock Purchase Plans, and other financial benefitsCompany paid Basic Life, AD&DShort-term and long-term disability insurance (90 day waiting period)Employee Assistance ProgramSick and Vacation time (Flex time for salary positions, Accrued hours for Hourly positions), and Paid HolidaysBack-up childcare and parenting support resourcesVoluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insuranceWeight Loss and Tobacco Cessation ProgramsTesla Babies programCommuter benefitsEmployee discounts and perks programExpected Compensation$128,000 - $414,000/annual salary + cash and stock awards + benefitsPay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The total compensation package for this position may also include other elements dependent on the position offered. Details of participation in these benefit plans will be provided if an employee receives an offer of employment.

• Degree in Electrical Engineering, Computer Science, or equivalent experience
• 3+ years of hands-on RTL design experience in SoC interconnect, memory systems, or data path components for custom ASICs
• Strong proficiency in Verilog or SystemVerilog for complex digital design
• Solid understanding of AXI protocol and high-performance design techniques (e.g., pipelining, clock domain crossing)
• Experience with synthesis, timing analysis, and linting tools (e.g., Synopsys Design Compiler, SpyGlass)
• Ability to work in a fast-paced, collaborative environment with strong problem-solving skills
• Proven track record in Network on Chip (NoC) design, including topology selection, routing algorithms, and QoS mechanisms
• Deep expertise in DMA engine design, memory controller architectures (e.g., DDR/LPDDR interfaces), MMUs, and priority arbiters for multi-master systems
• Experience with high-performance SoC data path optimization for AI/ML accelerators or HPC applications
• Familiarity with verification methodologies (e.g., UVM) and scripting (Python/Perl) for automation

Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire:

• Medical plans > plan options with $0 payroll deduction
• Family-building, fertility, adoption and surrogacy benefits
• Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution
• Company Paid (Health Savings Accounts) HSA Contribution when enrolled in the High-Deductible medical plan with HSA
• Healthcare and Dependent Care Flexible Spending Accounts (FSA)
• 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits
• Company paid Basic Life, AD&D
• Short-term and long-term disability insurance (90 day waiting period)
• Employee Assistance Program
• Sick and Vacation time (Flex time for salary positions, Accrued hours for Hourly positions), and Paid Holidays
• Back-up childcare and parenting support resources
• Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance
• Weight Loss and Tobacco Cessation Programs
• Tesla Babies program
• Commuter benefits
• Employee discounts and perks program

Expected Compensation

$128,000 - $414,000/annual salary + cash and stock awards + benefits

Pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The total compensation package for this position may also include other elements dependent on the position offered. Details of participation in these benefit plans will be provided if an employee receives an offer of employment.

The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI inference chips tailored to accelerate Tesla’s machine learning capabilities. A key part of this effort is Dojo, Tesla’s custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Tesla’s AI Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance. By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life.