Staff Hardware Engineer
Pixels on Target
Plantation, FL, United States
about 1 month ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours
Job source
Tech stack
Agile Methodology
Airflow
Altium Designer
Computer Engineering
Software Debugging
Linux
Electronic Design Automation
Ethernet
Firmware
Field-Programmable Gate Array (FPGA)
Hardware Design
Joint Test Action (IEEE Standards)
+12 more
LTspice
OrCAD
PCI Express
Real-Time Operating Systems
Software Reliability Testing
Universal Asynchronous Receiver/Transmitter
Verilog
VHSIC Hardware Description Language (VHDL)
CPLD
Serial Peripheral Interface
Git
Software Version Control
Job description
Pixels On Target is hiring a Senior Hardware Design Engineer to own board?level design from concept through production. You’ll architect reliable, high?performance embedded hardware and partner closely with firmware, mechanical, and manufacturing teams to ship products at scale., * Own board design end?to?end: requirements, architecture, component selection, schematics, layout constraints, DFM/DFT, prototyping, and release to manufacturing.
- Design multi?layer, high?density PCBs: impedance?controlled routing, length matching, differential pairs, HDI (blind/buried vias), fine?pitch/BGA packages.
- Build embedded platforms: microcontrollers/SoCs, memory (DDR/LPDDR), power delivery (PMICs, DC?DCs, sequencing), peripherals and sensors.
- High?speed I/O: architect and validate PCIe, USB 3.x, Ethernet, MIPI, LVDS, I2C, SPI, UART, CAN.
- Bring?up & debug: lead hardware bring?up with firmware; isolate issues using oscilloscopes, logic/spectrum analyzers, power analyzers, JTAG/SWD, and boundary?scan.
- Verification (EVT/DVT/PVT): create and execute test plans for functionality, SI/PI, power/thermal, environmental and reliability; document results and drive fixes/ECOs.
- Optimize performance: analyze CPU, memory, I/O, and power budgets; tune for power consumption, thermal efficiency, stability, and cost.
- Compliance & quality: design for EMI/EMC and safety; coordinate pre?scan and certification (e.g., FCC/CE/UL); ensure RoHS/REACH compliance.
- Manufacturing collaboration: work with CMs/EMS partners on stack?ups, build reviews, test fixtures, yield improvements, and FA/RMA resolution.
- Technical leadership: run design reviews, mentor engineers, manage risks/schedules, and maintain crisp documentation in PLM/requirements tools.
Requirements
- 5+ years of board?level hardware design experience shipping products (or equivalent).
- Proficiency with ECAD tools (Altium Designer, Cadence OrCAD/Allegro, or KiCad) and strong schematic/layout fundamentals.
- Proven experience with embedded system hardware (MCUs/SoCs, memory, PMICs) and low?power techniques for battery? or energy?constrained devices.
- Solid grounding in signal and power integrity, impedance control, termination, decoupling, and clocking.
- Hands?on lab skills for bring?up, validation, and root?cause analysis using standard bench equipment.
- Ability to write clear test plans, reports, and release documentation; fluency with ECOs and design controls.
- Effective collaboration with firmware, software, mechanical, thermal, and manufacturing teams.
- BS/MS in Electrical or Computer Engineering (or equivalent practical experience)., * FPGA/CPLD experience (Verilog/VHDL).
- SI/PI and thermal simulation tools (e.g., HyperLynx, Sigrity, LTspice) and EMI/EMC mitigation techniques.
- Regulatory and reliability testing (e.g., IEC 62368, FCC Part 15, ESD IEC 61000?4?2, HALT/HASS).
- DFM/DFT/ATE, boundary?scan (IEEE 1149.1/1149.6), ICT/flying probe, and functional test fixture development.
- Supply chain awareness: lifecycle/ALT sourcing, risk management, and cost optimization.
- Thermal management (heat?sinks, airflow, interface materials, simulation).
- Linux/RTOS bring?up familiarity and common boot/debug flows.
- Experience with PLM (e.g., Arena/Agile) and version control (e.g., Git).
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