?? Senior FPGA Engineer - Contract | London (Hybrid
Adepta Partners
London, United Kingdom
3 days ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours
Job source
Tech stack
Automation of Tests
Linux
Ethernet
Field-Programmable Gate Array (FPGA)
Python (Programming Language)
Network Protocols
PCI Express
Transmission Control Protocol (TCP)
Verilog
VHSIC Hardware Description Language (VHDL)
Vivado
Low Latency
+1 more
Hardware Debugging
Requirements
- 5+ years’ commercial FPGA design experience
- Strong VHDL and/or Verilog development skills
- Experience with AMD/Xilinx Vivado, synthesis, timing closure and hardware debugging
- Knowledge of high-speed networking protocols including TCP/UDP, Ethernet, PCIe and DMA
- Python and Linux experience for testing and automation
- Experience with low-latency systems, ideally within financial trading, capital markets or telecommunications
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