Firmware Engineer

SCIO TEQ LLC
Duluth, GA, United States
2 months ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Working hours
Regular working hours
Job source

Tech stack

Boolean Algebra Configuration Management Ethernet Firmware Field-Programmable Gate Array (FPGA) PCI Express Signal Integrity Universal Asynchronous Receiver/Transmitter Verilog VHSIC Hardware Description Language (VHDL) Video Editing Vivado
+3 more
Serial Peripheral Interface Fpga Hardware Low Latency

Job description

ScioTeq offers a small company feel while projecting a big company presence. Our engineering work is very hands-on and collaborative as we design, prototype, test, and industrialize computing products for a variety of applications and customers. We are expanding our engineering team and are looking for an experienced FPGA firmware design engineer who can join our team in Duluth, Georgia. If you have strong firmware design abilities and the interpersonal skills needed to effectively collaborate and support our product development activities, then read on.

ScioTeq Rugged Smart Display and Computer products are designed to provide high computing and video processing performance in extreme operating environments governed by MIL STD and EN military specifications. Designed with the latest commercially available CPU modules, we use FPGA’s to handle HMI interfaces, coordinate I/O and perform low latency video processing. These products are rarely sold as “off the shelf” products. Customers typically require customization for their specific applications and requirements. This often requires creative problem solving, coordination with hardware and software engineers, and adaptable firmware designs. The FPGA Firmware Engineer has the following main responsibilities:

* FPGA firmware implementation of feature requirements for new products and custom features

  • Development of FPGA based video processing algorithms
  • Develop and execute simulation testbenches for functional verification
  • Troubleshooting and problem resolution for existing product issues
  • Collaborate with PCB/hardware engineers on pinout, power, and signal integrity requirements
  • Write and maintain design documentation, including block diagrams and interface specifications
  • Provide firmware configuration management and release schedules
  • Research toward related emerging FPGA technologies and tools

Requirements

Do you have experience in Research?, Do you have a Bachelor’s degree in engineering?, * 5-10 years FPGA firmware design experience

  • BSEE or BSCE required
  • Ability to apply understanding of digital logic design and verification concepts to the development of FPGAs.
  • Proficient with VHDL and/or Verilog
  • Experience with at least one major vendor toolchain (Xilinx/AMD Vivado, Intel/Altera Quartus, or Lattice Diamond). Xilinx Vivado preferred.
  • Experience writing simulation test benches and interpreting waveform results
  • Familiarity with common interfaces: SPI, I2C, UART, AXI, PCIe, Ethernet, or similar
  • Experience working in cross-functional product development teams
  • Must be self-motivated with strong work ethic, teachable, and collaborative
  • US Person required

About the company

ScioTeq, a leading brand in high performance, high quality rugged displays and computers, has been serving the defense and security community around the world for over 35 years. Today’s military requires leading edge computing and display capabilities in all their vehicles. ScioTeq products are designed to not only meet high tech performance requirements but also survive incredibly harsh and extreme environments.

Apply for this position

This job is hosted externally. Click below to view the full posting and apply.

Apply on indeed.com

Good distractions

Talks and stories from around this role — technically off-topic, practically not.

5:59 min

Compiling routing logic into certified safety microcontrollers

Ulrich Wurstbauer +1 · LIVE

4:52 min

Connecting namespaces with local virtual ethernet pairs

Oliver Seitz Oliver Seitz · WWC 2025

1:28 min

Exploring quantum execution frameworks and hardware layouts

Alex Waldherr Alex Waldherr · WWC 2022

2:12 min

Implementing automotive ethernet and connected remote vehicle telemetry applications

David Romić · WWC 2023

8:07 min

Transitioning from web development to constrained hardware engineering

Philipp-Alexander Blum · LIVE

2:58 min

Audience questions on securing legacy buses and architecture isolation

Henning Harbs · WWC 2023

Videos

See all

Related articles

See all