Senior ASIC Methodology Engineer - LPU Division

NVIDIA Ltd.
United States
3 months ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Experience required
5 years minimum
Compensation
$152,000.0 - $241,500.0
Working hours
Regular working hours
Job source

Tech stack

Artificial Intelligence Data Analysis Computer Programming Computer Engineering Computer Graphics Data Security Logic Synthesis of Circuits Perl (Programming Language) Formal Verification Hardware Design Python (Programming Language) Shell Script
+5 more
Application Specific Integrated Circuits Information Technology Real Time Data Hardware Acceleration Physical Design

Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology-and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

This role exists to redefine how AI hardware is built by inventing the next wave of hardware development methodology. You will pioneer AI-driven and sophisticated automation techniques that transform how sophisticated ASICs are conceived, explored, and brought to closure. Working shoulder-to-shoulder with an outstanding ASIC development team, you will invent novel architectures and end-to-end workflows that transcend traditional infrastructure, unlocking new levels of capability across logic design, verification, and physical design.

Join us as we drive towards the next generation of artificial intelligence technology!

What you’ll be doing:

  • Take a comprehensive view of the ASIC development lifecycle, identifying cross-stage bottlenecks and opportunities where automation and AI can improve predictability, convergence, and turnaround time.

  • Identify, curate, and leverage real-time data to enable effective AI models and analytics, working with infrastructure teams to ensure scalable and secure data pipelines.

  • Establish quantitative metrics to measure efficiency, quality, and cycle-time improvements; use data-driven insights to guide methodology decisions and prioritize investments.

  • Serve as a technical catalyst within both the team and the wider company by sharing best practices, publishing internal guidelines, and mentoring engineers on emerging AI-enabled development techniques.

Requirements

  • Bachelor’s or Master’s degree in Computer Science, Computer Engineering, or Electrical Engineering (or equivalent experience).

  • 5+ years of proven industry experience.

  • A proven track record developing groundbreaking ASIC design frameworks and flows.

  • First-hand experience with RTL, functional verification, formal verification, or physical design would be an asset.

  • High-level programming skills including experience with Python, PERL, Make, and shell scripting.

  • Experience with AI frameworks including knowledge of agentic flow development.

  • Standout colleague with excellent verbal and written communication skills.

Benefits & conditions

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 152,000 USD - 241,500 USD for Level 3, and 184,000 USD - 287,500 USD for Level 4.

You will also be eligible for equity and benefits (https://www.nvidia.com/en-us/benefits/) .

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