PCIe Engineer (RTL)
Berkeley Square - Talent Specialists in IT & Engineering
Boiro, Spain
7 days ago
Role details
Contract type
Permanent contract Employment type
Full-time (> 32 hours) Working hours
Regular working hours Languages
English Experience level
SeniorJob location
Boiro, Spain
Tech stack
Bash
C++
Perl
Python
PCI Express
Subversion
Systems Integration
Tcl (Programming Language)
Verilog
VHDL
Scripting (Bash/Python/Go/Ruby)
Application Specific Integrated Circuits
GIT
Software Version Control
Job description
Join a high-performance design team working on next-generation semiconductor solutions. You'll define architecture and lead RTL development for PCIe, ensuring seamless integration with coherent subsystems (AMBA-CHI).
This role offers the chance to shape high-speed interfaces and collaborate with expert engineers across multiple domains.
Requirements
- 4+ years industry experience
- Strong background in PCIe design or integration
- Experience integrating IPs in SoC/ASIC environments
- Familiarity with AXI, CHI or AHB
- Solid RTL skills (Verilog/VHDL) and block-level testing
Nice to Have
- Master's or PhD
- C++ and/or scripting (Python, Perl, Bash, TCL)
- Experience with version control (git, svn)
