PDL/FPGA-Hardware-Tester
Zoiss Engineering Gmbh
Lindenberg i. Allgäu, Germany
4 days ago
Role details
Contract type
Permanent contract Employment type
Full-time (> 32 hours) Working hours
Regular working hours Languages
English, German Compensation
€ 94KJob location
Lindenberg i. Allgäu, Germany
Tech stack
Field-Programmable Gate Array (FPGA)
Tcl (Programming Language)
VHDL
Information Technology
Job description
- Definition of requirements of PLD/FPGA test and its test equipment
- Verification and evaluation of verification data and test results
- Creation of test and verification documentation
- Development of test applications
- Creation and performance of verification tool qualifications, as well as their further development
- Analysis methods development and their performance for customer products
Requirements
- Successfully completed studies in the field of computer science, electrical engineering, electronics or similar qualification
- Experience in development and/or verification of PLD/FPGA
- Knowledge of modern verification methods
- Knowledge of VHDL and TCL
- Analytical and structured way of working
- English (must) and German (min. Level B1) skills
- Team player
- ISTQB qualification (nice to have)
- DO-254 Knowledge (nice to have)
Benefits & conditions
- Thorough training
- Gym subsidy
- Above-average pay
- Attractive expense allowance
- 30 days of paid holiday
- Holiday and Christmas bonuses
- BAV and VWL