Digital Design Engineer

Digital / RTL Design

• Strong RTL design experience using VHDL and Verilog, covering both design and testbench development
• Proven experience integrating ARM Cortex cores, with solid knowledge of ARM AMBA bus protocols (AHB, APB)
• Good understanding of low-power digital design techniques, including clock gating, power gating, and retention
• Experience working with common digital interfaces such as UART, SPI, and I C

Verification & Tooling

• Hands-on experience with simulation tools, ideally QuestaSim / ModelSim
• Ability to interpret and debug linting reports, CDC checks, and synthesis reports
• Familiarity with scripting and automation, particularly Python, is highly desirable