Digital Design Engineer

BEng or MEng in Engineering, Electronics, or a related discipline

5+ years experience in digital or mixed signal design

1+ years experience in a people management or technical leadership role

Hands-on experience in digital IC design using Verilog, SystemVerilog, and/or VHDL

Desirable experience:

Mixed signal design exposure

Familiarity with the full ASIC front end and back end flow

Python scripting

Experience using tools such as JIRA and Confluence