Firmware Manager
Role details
Job location
Tech stack
Job description
- We are looking for a Digital Electronics Discipline Manager to join the UK ECC (Engineering Competence Centre) in the Central Engineering team that is challenged with supporting complex Digital FPGA projects across all Thales Domains.
- The successful candidate must have experience managing the complete FPGA development lifecycle particularly digital architecting and FPGA verification. They will report directly to the UK Hardware Operations Manager and will define, support and/or commence execution of FPGA Engineering management activities on a range of Domains within the Thales UK perimeter.
- The role encompasses people, technical, tactical and delivery management for the FPGA based projects. The role operates within a complex wider engineering environment and requires management of multiple stakeholders across many levels within the organisation
- Accountable for all aspects of Delivery Performance of the respective Digital Electronic Discipline: including the delivery of tasks, activities, work packages and the provision of resources; as well as ensuring, competence, Hardware Quality Assurance, utilising control data analytics to monitor delivery performance and project alignment with adjacent stakeholders and customers. Ensuring adherence to processes, methods and practices. Additionally optimally mitigating stakeholder and customer escalations and exceptions and leading a culture of continuous improvement.
Location(s): Crawley or Reading or Cheadle or Bristol or Templecombe or Belfast or Glasgow or any other Thales site in the UK
Principle Relationships: Relationships will be required to be built and maintained with the following principals:
- Engineering Director
- Engineering Operations Director
- Head of ECC-UK
- MoB&F Director
- CBU Heads of Hardware
- Head of HR, Engineering
- CBU Heads of Engineering, * Support the optimisation of Thales UK performance: costs and schedule adherence of any activity by delivering FPGA development related elements of an engineering competitiveness action plan by simplifying / adapting the processes, practices tools and interfaces and changing the working methods in appropriate engineering domains.
- Manage and optimise the FPGA design, development and verification capability within Hardware. Quantify skills, competences, processes, tools and facilities in line with business needs (including improvement of accurate or estimated resource demand within IBP)
- The role holder will also work closely with the MoB&F Director to enable the exploitation of the Engineering supply chain and capabilities across the Thales Group including the ECC's in France, Romania and India.
- Support the development and integration of the UK Hardware engineering environments aligned with UK Engineering Environments and the Thales Group strategy.
- Working with the Head of ECC-UK and HR, support the Engineering Talent Review Process, developing pipelines of talent for Thales UK
- Work collaboratively with Business Lines to implement the Engineering Governance and Organisation Principles to deliver strong engineering performance, driving down inefficiencies and improving competency.
- Will act as the Team Lead (Line Manager) for the employees within your direct reporting line.
- Is accountable for reporting of performance metrics and escalation of issues from the respective Capability within ECC-UK.
- Adherence to digital electronics and FPGA development practices
- Stakeholder management confidence via guidance and knowledge sharing of project progress and pre-established practices. Particularly the unique practices necessary to deliver contemporary FPGA solutions
- Delivery on time to project
- Supply (competence and capacity) to demand, * Due to the nature of the work that we do at Thales, many of our roles are subject to security restrictions. This role requires you to be a UK National and achieve Security Clearance (SC) without any caveats. It would be advantageous if currently held, however, if not currently held, it is a requirement that the successful applicant undergo, achieve, and maintain SC Clearance prior to commencing employment. If approved by the MOD, a dual national from a Non-ITAR country may be considered. Please visit the UKSV website for further guidance.
Requirements
- The candidate must have digital design and leadership experience, supported either by a professional qualification in FPGA development or proven equivalent experience, and able to prove knowledge of digital architecture design and FPGA lifecycle development
- Required to operate in a complex governance framework within Engineering, Project Management, Quality, Industry and Safety.
- The candidate must have strong knowledge and proven application of hardware engineering project delivery and processes across the full project lifecycle and experience of working in an engineering environment is essential.
- The candidate must have experience of engineering management leadership and in managing complex teams and projects.
- The candidate requires a flexible and pro-active approach to perform effectively in a fast-changing business environment., * To be eligible for full SC, you generally need to have resided in the UK for the last 5 years. In some circumstances, a minimum of 3 years' residence in the UK over the last 5 years may be accepted, with additional overseas checks.
#LI-DB1
In line with Thales' Baseline Security requirements, candidates will be asked to provide evidence of identity, eligibility to work in the UK and employment and/or education history for up to three years. Some vacancies may require full Security Clearance which can require further evidence to be provided. For further details of the evidence required to apply for Baseline and Security Clearance please refer to the Defence Business Services National Security Vetting (DBS NSV) Agency.