Digital Design Engineer
Role details
Job location
Tech stack
Job description
We are looking for a DRAM Design Engineer to design and verify digital blocks for next-generation memory products. You will work closely with architecture, integration, and verification teams to deliver high-performance, high-reliability DRAM solutions.
Responsibilities
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Design digital blocks such as control logic, BIST, DfT, using semi-custom methodologies.
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Define interface, behavior, and functional requirements for digital blocks.
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Collaborate with block owners and integration teams to ensure full-chip integration.
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Develop testbenches for behavioral and synthesizable designs.
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Perform functional and gate-level verification.
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Support silicon bring-up and design validation activities.
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Use AI-driven tools to streamline workflows and enhance design efficiency., Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
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Requirements
Do you have experience in Verilog?, Do you have a Master's degree?, * Master's degree in Electrical Engineering or equivalent practical experience.
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Experience in RTL design of digital blocks with Verilog or VHDL.
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Experience with schematic/gate level design and simulations.
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Experience with industry-standard EDA tools (e.g., SystemVerilog, Design Compiler, PrimeTime, Xcelium, Spyglass).
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Experience with scripting languages and automation tools such as Python, TCL, Claude Code, Atlassian toolchain.
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Strong analytical skills with the ability to work independently and contribute effectively in multi-functional teams.
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Comfortable working in an international engineering environment.
Preferred Qualifications
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Experience with Clocking concepts, Synthesis, Constraining, STA.
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Memory design experience.