Lead Software Engineer

Cadence Design Systems is looking for a highly motivated Software Engineer to work with the Innovus Research and Development engineering team in the IC Digital business unit. You will be part of a team responsible for designing, developing, troubleshooting, debugging and supporting Place and Route Software.

Highly technical engineer with excellent problem solving skills C/C++ software development experience in Linux environment Strong understanding and extensive usage of data structures and algorithms Great communication skills and a strong desire for working with customers MS (Ph.D. track a plus) in Electrical Engineering, Computer Science.

Preferred: Knowledge of interconnect routing algorithms, 3D-IC integration, timing analysis and multithreading is a strong plus. Prior R&D experience working on IC physical designs tools Hands on experience using the above physical design tools for design closure and knowledge of physical design flows a plus. Experience with Tcl and other scripting languages

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This Position is in our Digital & Signoff Group (DSG) DSG addresses one of the biggest and most competitive market segments in the semiconductor industry: digital system on chip (SoC) implementation and signoff. Join some of the brightest minds in this area to drive advancements in technologies including digital front-end design, IC digital implementation, and silicon signoff and verification.