Infrastructure Architect / Micro Architect
Role details
Job location
Tech stack
Job description
We are seeking a SoC Micro Architect to define and drive architecture for Adaptive SoC and FPGA platforms. This role focuses on hardware and software for configuration and control functions. You will work on Firmware and Hardware, develop SW-readable specifications, and create software models to enable seamless configuration and control across Adaptive SoCs., * Define and develop Architecture for configuration and control functions across Adaptive SoC and FPGA platforms
- Create SW-readable specifications for configuration/control features and ensure alignment with firmware and RTL implementation
- Develop and maintain software models for system-level simulation and validation
- Collaborate with hardware, firmware, and software teams to ensure cohesive integration
- Drive performance, power, and area (PPA) optimization for configuration/control paths
- Analyze trade-offs for scalability, reliability, and manufacturability across roadmap devices
- Provide architectural guidance for boot/reset flows, power management, and system-level QoS
- Influence strategies for security, safety, and lifecycle management in configuration/control domains, AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here. This posting is for an existing vacancy.
Requirements
Do you have experience in Verilog?, You are passionate about complex Adaptive SoC architecture and thrive in environments that require cross-domain expertise. You have deep technical knowledge in RTL , Firmware, and system-level modeling, combined with strong analytical skills. You excel at collaborating across hardware and software teams and can influence architecture decisions for next-generation adaptive silicon., * Strong background in SoC architecture including Processor Subsystems, FPGA, and AI/ML integration
- Hands-on experience with firmware development, RTL design, and hardware/software co-design
- RTL design experience specifically System Verilog
- Expertise in creating SW-readable specifications and system-level models
- Familiarity with AXI or similar on-chip protocols, low-power design techniques, and boot/reset flows
- Proficiency in modeling and automation using Python, System-C, or similar languages
- Firmware development for integration of embedded processor, C++ proficiency
- Knowledge of design methodologies, advanced process technologies, and associated challenges
- Proven track record in delivering architecture for adaptive SoCs, or similar complex platforms, * BS/MS/PhD in Electrical or Computer Engineering