Silicon Design Engineer

Join AMD's Adaptive and Embedded Computing Group (AECG) and help shape the future of high-performance computing. We are seeking a Senior Silicon Design Verification Engineer to play a pivotal role in delivering next-generation silicon by driving pre-silicon verification for advanced Network-on-Chip (NoC) architectures and cutting-edge DRAM memory controller IPs (LPDDR6, HBM4).

In this role, you won't just verify designs-you'll influence architecture, elevate quality, and help ensure first-pass silicon success on some of the industry's most advanced technologies. You'll work across IP and SoC levels, leveraging state-of-the-art simulation and formal verification techniques in a highly collaborative, innovation-driven environment. The Person

You are a proven verification expert with a passion for solving complex challenges and delivering high-quality silicon. You bring a strong track record of executing verification strategies for IP and/or SoC designs and thrive in fast-paced, technically demanding environments.

You're not just a contributor-you're an influencer. With strong communication and leadership skills, you collaborate effectively across design, architecture, and software teams, helping drive decisions that improve product quality and execution. You also enjoy mentoring others and elevating the team around you. Key Responsibilities

• Drive verification of advanced NoC architectures and next-generation DRAM memory controllers (LPDDR6, DDR5, HBM4), ensuring best-in-class quality and performance
• Architect, develop, and optimize simulation and formal-based verification environments at both IP and SoC levels
• Own the full verification lifecycle: planning, execution, tracking, closure, and delivery
• Create and execute robust verification plans, including sophisticated testbenches and coverage-driven test strategies
• Partner cross-functionally with design, architecture, and software teams to define and implement scalable verification methodologies
• Apply advanced techniques including UVM, assertion-based verification, and formal methods
• Mentor and guide junior engineers, fostering a culture of technical excellence and continuous innovation, AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

• Demonstrated success driving verification strategy and execution for NoC and/or memory controller IPs
• Strong expertise in SystemVerilog and UVM, with hands-on experience in simulation tools such as Synopsys VCS or Cadence Xcelium
• Deep understanding of modern verification methodologies, including assertion-based and coverage-driven verification
• Experience shaping verification architecture, tools, and infrastructure for complex, high-performance silicon designs is highly valued
• Familiarity with regression and verification management tools, including database-driven workflows
• Exposure to formal verification tools such as VC Formal, JasperGold, or Questa Formal is a plus
• Experience with gate-level simulation, power-aware verification, or silicon debug (tester/board level) is a plus

Academic Credentials

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.