Remote

We are sharing a specialised part-time consulting opportunity for digital hardware professionals experienced in ASIC and SoC engineering, RTL development, functional verification, hardware debugging, testbench architecture, and production silicon workflows. This role supports a remote collaboration focused on improving how advanced AI systems understand and evaluate real-world semiconductor engineering work. Selected professionals will apply their practical hardware expertise to develop realistic chip design and verification problems, create rigorous reference solutions, assess technical outputs, identify subtle engineering failures, and contribute to high-quality evaluation workflows., Hardware Problem Development

• Design realistic chip engineering problems based on practical ASIC, SoC, RTL, debugging, or verification experience
• Develop tasks reflecting production-level engineering scenarios rather than textbook exercises
• Create problems involving subsystem behavior, interface protocols, multi-module dataflow, timing, coverage, and system configuration
• Calibrate technical difficulty and expected outcomes against real hardware engineering standards

RTL, Testbench & Reference Solution Creation

• Develop reference RTL, testbenches, assertions, and supporting technical materials
• Work with SystemVerilog, Verilog, and relevant verification methodologies
• Produce clear solution paths covering design intent, implementation decisions, and expected behavior
• Review technical artifacts for correctness, completeness, readability, and engineering rigor

Technical Evaluation & Debugging

• Evaluate technical outputs across design, verification, debugging, formal analysis, and implementation workflows
• Identify incorrect assumptions, protocol violations, timing issues, coverage gaps, and RTL defects
• Assess whether proposed solutions reflect practical semiconductor engineering judgment
• Explain technical failures clearly and document how an experienced engineer would improve the approach

Quality Calibration & Collaboration

• Collaborate with other hardware professionals to maintain consistent standards of rigor and difficulty
• Review peer-created problems, reference solutions, testbenches, and evaluation criteria
• Apply structured assessment frameworks across different hardware engineering domains
• Communicate technical findings clearly while working independently in a remote environment

• Hands-on experience in ASIC or SoC design, functional verification, formal verification, or related semiconductor engineering work
• Practical exposure to production silicon, tapeout, IP integration, bring-up, or coverage closure
• Strong fluency in SystemVerilog or Verilog
• Experience building, reviewing, or debugging RTL and verification environments
• Solid understanding of subsystem and SoC-level engineering concerns
• Strong written communication and the ability to explain complex hardware decisions clearly
• Availability to contribute approximately 20-40 hours per week depending on project scope
• Current location in the United States

Educational Background

• A degree in electrical engineering, computer engineering, computer science, physics, or a related technical field is helpful
• Current doctoral study, graduate-level research, or professional semiconductor engineering experience is highly relevant
• New graduates with strong practical project experience and senior engineers with production silicon backgrounds are encouraged to apply
• Equivalent hands-on experience in chip design, verification, FPGA development, or hardware systems engineering is also highly valuable

Nice to Have

• Experience with RTL design, microarchitecture, IP integration, or subsystem development
• Familiarity with NoC, PCIe, DDR, ARM, AXI, handshaking, backpressure, and clock-domain crossing
• Experience with UVM, SVA, CocoTB, formal verification, coverage closure, or testbench architecture
• Familiarity with Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi, or comparable industry tools
• Experience with Icarus Verilog, Verilator, Yosys, OpenROAD, or other open-source hardware toolchains
• Knowledge of PPA optimization, timing closure, synthesis, or analog and mixed-signal design verification
• Previous experience with AI evaluation, technical benchmarking, or structured model assessment

Why This Opportunity

• Apply practical semiconductor engineering expertise to structured remote work
• Contribute to the development of advanced hardware reasoning and evaluation systems
• Create realistic design and verification challenges based on real engineering experience
• Use your ability to identify subtle RTL, timing, protocol, and verification issues
• Participate in flexible, high-impact technical work with competitive hourly compensation

Contract Details

• Part-time W-2 contingent employment arrangement
• Fully remote within the United States
• Expected commitment of approximately 20-40 hours per week depending on availability and project requirements
• Competitive rates between $65-$95 per hour depending on experience, technical depth, and project scope
• Role-based engagement involving collaboration with technical reviewers and engineering teams
• Projects and weekly commitments may be adjusted depending on scope, performance, and business needs
• Work will not involve access to confidential or proprietary information from any employer, client, or institution

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