Engineer II - Architecture

Microchip Technology
San Jose, CA, United States
3 months ago

Role details

Contract type
Internship / Graduate position
Employment type
Full-time (> 32 hours)
Experience level
Starter
Experience required
0 years minimum
Compensation
$70,304.0 - $143,000.0
Working hours
Regular working hours
Job source

Tech stack

Computer Engineering Perl (Programming Language) Field-Programmable Gate Array (FPGA) Python (Programming Language) PCI Express Systems Architecture SystemC Tcl (Programming Language) Scripting Application Specific Integrated Circuits Information Technology

Job description

  • Work with cross-functional teams to deliver high-performance IP integrations into Microchip FPGA products
  • Work on ASIC & FPGA IP development, integration, and deployment for components such as PCIe, CXL, DDR, NOC, High Speed Serial Transceivers, High Performance Parallel IO interfaces, eNVM, eSRAM, configuration subsystem etc.
  • Understand customer use models and the role of IP in overall system architecture
  • Work cross-functionally with other architects, designers, and back-end implementation teams

Requirements

  • Bachelors in Computer Engineering, Electrical Engineering, Computer Science, Math, Statistics or Physics.
  • 0-3 years’ relevant research or work experience in programmable architectures, applications implementation, or other relevant experience.
  • Practical experience in ASIC & FPGA IP development, integration, and deployment, including all stages of development from Synthesis, constraint management, place & route, floor planning, timing closure, CDC/RDC demonstrated in research projects, prior work or internships.
  • Proven ability to work cross-functionally with other architects, designers, and back-end implementation teams, * Masters in Computer Engineering, Electrical Engineering, Computer Science, Math, Statistics or Physics
  • Knowledge and experience with system-level performance modeling in TLM/SystemC/Other
  • Experience in technical leadership and people management
  • Knowledge and experience with Synopsys & Cadence ASIC flows
  • Scripting for EDA in Perl, Python, Tcl

Benefits & conditions

Feeling, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others

Physical Requirements:

10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hours

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position, which could be performed in the US, is $70,304 - $143,000.*

  • Range is dependent on numerous factors including job location, skills and experience.

About the company

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you., Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

This position is in the Silicon Architecture team of Microchip’s FPGA Division. Microchip is a major supplier of low-power and highly-reliable field-programmable gate arrays (FPGAs). Our FPGAs are used in a wide variety of applications, including embedded vision; digital signal processing; machine learning; industrial and medical equipment; and satellites. Microchip is also a pioneer in embedding RISC-V processors in FPGAs.

The successful applicant will work as part a core team to develop future FPGA device products and will collaborate with other engineering disciplines to model, develop, verify, and integrate various system components such as IO, hard IP blocks, hard & soft IP solutions, system clocking that interoperate with overall configuration and security features to deliver performant FPGA products.

Apply for this position

This job is hosted externally. Click below to view the full posting and apply.

Apply on indeed.com

Good distractions

Talks and stories from around this role — technically off-topic, practically not.

1:04 min

Introduction to Bitcoin script parsing tools

Steve Shadders · LIVE

4:18 min

Prioritizing communication and structural awareness over strict tool mastery

Liam Hurrel +1 · WWC 2021

1:53 min

Evaluating traditional scripting languages for modern development tasks

Jens Knipper Jens Knipper · Europe 2026 Virtual

1:20 min

Identifying multi-disciplinary talent for developer experience engineering roles

Hazal Mestci +1 · Coffee With Developers

1:53 min

Entering software development through retro computing platforms

Alex Soto Alex Soto · LIVE

4:30 min

Evaluating developer experience constraints in native scripts

Steve Shadders · LIVE

Videos

See all

Related articles

See all