Staff Digital Design Engineer iv)

Infineon Technologies AG
Valencia, Spain
about 1 month ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience required
3 years minimum
Working hours
Regular working hours
Languages
English
Job source

Tech stack

Computer-Aided Design ARM Architecture Code Coverage Digital Electronics Logic Synthesis of Circuits Requirements Management Static Timing Analysis SystemVerilog Verilog Jama (Software) State Machines Front End Software Development
+1 more
Programming Languages

Job description

WeAreIn for jobs that impact everyone’s life. Build the future nobody’s dreamed of yet… are you ready to rethink the impossible? As a Staff Digital Design Engineer in our Research & Development team, you’ll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?, * Digital module requirements elaboration and capture in close collaboration with System/Digital Architects and Analog Design team members with regards to Analog-Digital interfacing

  • Develop digital block architecture under consideration of Automotive quality, testability and safety requirements (ISO26262) Digital RTL design implementation including: state machine design, synchronization, clock gating, low-power strategies, mixed-signal interfacing, static timing analysis (STA), design-for-test (DFT), clock-domain-crossing (CDC), etc
  • Digital design verification on block and top-level (UVM environment) and fault injection simulations according to ISO26262
  • Digital RTL synthesis using state-of-the-art tools, including DFT, low-power and safety requirements
  • Handover and collaboration with Digital Place & Route team, execute gate-level simulation; Contributions to continuous improvement of digital design methodology, best practices, guidelines
  • Conduct requirements/architecture/design reviews and generate relevant block design and sign-off documentation
  • Close collaboration on Design-for-Test strategy with Test Development Engineers to meet Automotive test coverage requirements. Support Test Development with ATPG pattern generation and simulation

Requirements

  • Master’s degree in Electrical Engineering with an emphasis on Digital Integrated Circuit Design or equivalent
  • Professional experience of 3+ years in digital IC front-end design covering aspects of architectural exploration, specification, modelling, timing analysis, design-for-test strategies and verification
  • Experience with advanced MCU/bus-system based digital architectures (e.g. ARM Cortex-M/AHB/AXI/etc.) is a plus
  • Experience with relevant coding languages and CAD tools used for digital IC design and verification (Verilog, System-Verilog, Synthesis, LINT, CDC, Static Timing Analysis, IR-Drop, ATPG, etc)
  • Experience with formal requirements management tools (e.g. Jama, Doors, …)
  • Exceptional team working attitude is a must; Collaborative and respectful team player, dedicated to team success
  • Fluency in English and excellent communication/listening skills

About the company

Carlos Ribeiro, LinkedIn

WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?

We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels.

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