Senior Digital Design Engineer

Responsibilities: Define, design, and implement memory controllers and subsystems (DDR, HBM) Develop and verify RTL (Verilog or VHDL) for memory blocks Work with timing constraints and perform block-level testing Integrate memory IPs into So C environments Collaborate with cross?functional teams to ensure coherency and high?performance operation Required: 8+ years of industrial experience in digital design Strong knowledge of DDR or HBM memories Proven experience designing or integrating memory controllers Hands?on experience with AXI protocol Proficiency in RTL design (Verilog or VHDL) Experience with timing constraints and basic block?level testing Master’s degree or Ph D Experience with version control (git, svn) Knowledge of coherency concepts and protocols Seniority level Mid?Senior level Employment type Full?time Job function Engineering and Design Semiconductor Manufacturing, Appliances, Electrical, and Electronics Manufacturing, and Computers and Electronics Manufacturing

Referrals increase your chances of interviewing at Beagle by 2x Get notified about new Digital Design Engineer jobs in Barcelona, Catalonia, Spain. #J-*****-Ljbffr