Hardware Security Engineer

We are working with a fast scaling Semiconductor company, who are looking for an experienced Hardware Security Engineer to join their growing hardware security team.You’ll define and own SoC security architecture across our Root of Trust, secure boot, cryptographic IP, and key management, while driving vulnerability analysis and mitigation across pre-silicon and production systems.This is a hands-on role bridging high-level security requirements with RTL-level implementation in a fast-paced, deep-tech environment.Key responsibilitiesDefine hardware security strategy and roadmap in collaboration with security & certification teamsOwn SoC Root of Trust architecture, including secure boot, crypto IP integration, and secure key storage/provisioningLead triage and mitigation of hardware vulnerabilities across design and deployed productsTranslate security requirements into RTL/microarchitectural implementations and countermeasuresEnsure compliance with relevant security standards and regulationsStay current with advances in silicon security, attack vectors, and trust architecturesRequirementsMaster’s/PhD in EE, CE, CS or related field5+ years in SoC/processor design with strong RTL (SystemVerilog/Verilog) expertiseDeep understanding of SoC security (RoT, secure boot, trust boundaries, secure elements)Experience with RISC-V privileged architecture (security aspects)Exposure to hardware attacks (fault injection, side-channel, debug interfaces)Low-level software skills (C and assembly)Strong technical documentation and cross-team collaboration skillsNice to haveExperience with OpenTitan / Caliptra or similar open-source security stacksKnowledge of PQC and cryptographic hardware implementationsExposure to silicon validation/bring-up and datacenter or AI infrastructure environmentsFamiliarity with confidential computing, TEEs, remote attestation, virtualization#J-*****-Ljbffr

Master’s/PhD in EE, CE, CS or related field 5+ years in SoC/processor design with strong RTL (SystemVerilog/Verilog) expertise Deep understanding of SoC security (RoT, secure boot, trust boundaries, secure elements) Experience with RISC-V privileged architecture (security aspects) Exposure to hardware attacks (fault injection, side-channel, debug interfaces) Low-level software skills (C and assembly) Strong technical documentation and cross-team collaboration skills Nice to have Experience with OpenTitan / Caliptra or similar open-source security stacks Knowledge of PQC and cryptographic hardware implementations Exposure to silicon validation/bring-up and datacenter or AI infrastructure environments Familiarity with confidential computing, TEEs, remote attestation, virtualization #J-*****-Ljbffr