Principal Digital Design Engineer (ASIC)

Experteer Overview As a Principal Digital Design Engineer, you shape technical strategy and architecture for complex SoCs, guiding security, performance, and implementation across multi-disciplinary teams. You will own RTL/architecture for digital blocks, drive timing closure, and mentor engineers while collaborating with system architects, DV, analog, and firmware teams. This role offers influence over product roadmaps and the opportunity to tackle challenging digital design problems at scale. You will work on high-impact projects that connect physical and digital worlds and push CMOS technology forward. Compensation / Benefits * Develop system-level models to analyze architecture trade-offs and inform partitioning * Own architecture, micro-architecture, and RTL design of complex digital blocks for mixed-signal ICs * Collaborate with multi-location teams across system architects, analog designers, DV, PD, product engineering, applications, and firmware * Lead design reviews and ensure alignment with project goals * Perform RTL coding (Verilog/SystemVerilog), synthesis, and lint/CDC analysis to meet timing, area, and power targets * Develop and execute verification plans with DV, including functional coverage and debug support * Analyze and resolve design, timing, and functional issues across the digital development flow * Contribute to top-level integration, interface definition, constraints, and physical implementation support * Mentor junior engineers and promote best practices * Author clear documentation, guides, and design collateral * Stay current with industry trends and identify process or technology improvements * Perform silicon lab evaluation and debugging * Use Python to develop tests on evaluation platforms Tasks * Bachelor or Master degree in Electrical Engineering, Computer Engineering, or related field * 10+ years of experience in digital design for ASIC/SoC with successful tapeouts * Strong understanding of ASIC design flow * Expertise in RTL design (SystemVerilog), synthesis, and digital verification with Cadence tools * Experience modeling and scripting (Matlab, TCL, Python) for design automation * Strong understanding of digital design flows, timing analysis, and constraints * Experience collaborating across DV, PD, systems, analog/mixed-signal * Excellent communication and documentation skills * Demonstrated ability to lead technical projects or major design subsystems * Strong understanding of business context and ability to align technical strategy with business goals Key requirements * medical, vision and dental coverage * 401k * paid vacation * holidays and sick time * discretionary performance-based bonus

alignment with project goals * Perform RTL coding (Verilog/SystemVerilog), synthesis, and lint/CDC analysis to meet timing, area, and power targets * Develop and execute verification plans with DV, including functional coverage and debug support * Analyze and resolve design, timing, and functional issues across the digital development flow * Contribute to top-level integration, interface definition, constraints, and physical implementation support * Mentor junior engineers and promote best practices * Author clear documentation, guides, and design collateral * Stay current with industry trends and identify process or technology improvements * Perform silicon lab evaluation and debugging * Use Python to develop tests on evaluation platforms Tasks * Bachelor or Master degree in Electrical Engineering, Computer Engineering, or related field * 10+ years of experience in digital design for ASIC/SoC with successful tapeouts * Strong understanding of ASIC design flow * Expertise in RTL design (SystemVerilog), synthesis, and digital verification with Cadence tools * Experience modeling and scripting (Matlab, TCL, Python) for design automation * Strong understanding of digital design flows, timing analysis, and constraints * Experience collaborating across DV, PD, systems, analog/mixed-signal * Excellent communication and documentation skills * Demonstrated ability to lead technical projects or major design subsystems * Strong understanding of business context and ability to align technical strategy with business goals Key requirements * medical, vision and dental coverage * 401k * paid vacation * holidays and sick time * discretionary performance-based bonus