HBM Datapath Architect

We are seeking a highly motivated HBM Datapath Architect to architect, design, and optimize high speed data paths for next generation High Bandwidth Memory (HBM) products! This role focuses on logic die and core die datapath circuitry, enabling industry leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring up and production. Responsibilities will include, but are not limited to:

• Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic
• Develop high speed, low latency datapath circuits supporting multi channel HBM architectures and wide internal buses
• Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes
• Design and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanisms
• Collaborate with multi-functional teams to translate specifications into robust micro architectures
• Collaborate with PHY, DFT, verification, and layout teams to ensure accurate functionality, testability, and manufacturability
• Drive schematic level and RTL level datapath implementations, including clocking, gating, and reset strategies
• Contribute to design reviews, documentation, and technical mentoring across HBM programs
• Demonstrate proficiency in using AI-enabled tools (e.g., Microsoft Copilot and other approved AI solutions) to improve productivity, streamline workflows, analyze information, and accelerate problem solving.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with 7+ years of relevant industry experience, or a Master’s degree with 5+ years of relevant industry experience.
• 3 + years of experience in high speed digital datapath design (memory, SerDes, or SoC datapath).
• 3+ years of hands on experience with digital schematic build, RTL, or mixed signal datapath implementations., * Strong understanding of HBM/DRAM architectures, including read/write data flow, timing, and multi channel operation.
• Working knowledge of layout and floorplanning considerations for high speed datapath.
• Experience with static timing analysis (STA) and timing closure methodologies.
• Familiarity with advanced process node challenges related to signal integrity, skew control, and power optimization.

The US base salary range that Micron Technology estimates it could pay for this full-time position is: $146,000.00 - $297,000.00 a year

Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on .

The HBM Architecture team develops advanced datapath solutions that enable industry leading bandwidth, power efficiency, reliability, and scalability for Micron’s next generation High Bandwidth Memory (HBM) products. The team collaborates closely across design, PHY, ECC, verification, layout, and system groups to drive innovative logic die and core die architectures from concept through production., Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.