PDL/FPGA-Hardware-Tester
Zoiss Engineering Gmbh
Waldshut-Tiengen, Germany
about 1 month ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Compensation
€47,500.0 - €63,000.0
Working hours
Regular working hours
Languages
English, German
Job source
Tech stack
Field-Programmable Gate Array (FPGA)
Tcl (Programming Language)
VHSIC Hardware Description Language (VHDL)
Information Technology
Job description
- Definition of requirements of PLD/FPGA test and its test equipment
- Verification and evaluation of verification data and test results
- Creation of test and verification documentation
- Development of test applications
- Creation and performance of verification tool qualifications, as well as their further development
- Analysis methods development and their performance for customer products
Requirements
- Successfully completed studies in the field of computer science, electrical engineering, electronics or similar qualification
- Experience in development and/or verification of PLD/FPGA
- Knowledge of modern verification methods
- Knowledge of VHDL and TCL
- Analytical and structured way of working
- English (must) and German (min. Level B1) skills
- Team player
- ISTQB qualification (nice to have)
- DO-254 Knowledge (nice to have)
Benefits & conditions
- Thorough training
- Gym subsidy
- Above-average pay
- Attractive expense allowance
- 30 days of paid holiday
- Holiday and Christmas bonuses
- BAV and VWL
About the company
Zoiss Engineering GmbH
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