Applications Engineering, Sr Staff Engineer

• Lead technical benchmarks for interconnect parasitic extraction on advanced FinFET nodes, demonstrating StarRC’s accuracy and performance advantages against customer requirements and competitive tools
• Drive pre-sales engagements including methodology presentations, live demos, and proof-of-concept evaluations that translate tool capabilities into measurable customer value
• Manage post-sales technical relationships with North America accounts, serving as the primary technical point of contact for parasitic extraction workflows in digital and custom design flows
• Resolve customer issues end to end, from initial triage through R&D engagement to deployment, tracking escalations and ensuring timely closure with clear communication to all stakeholders
• Plan and lead Technical Review Meetings and Management Review Meetings, aligning customer roadmaps with Synopsys solutions and identifying expansion opportunities
• Collaborate with sales, marketing, and R&D teams to define account strategies, shape product direction based on field feedback, and drive adoption of new features and methodologies
• Develop and deliver technical content including application notes, best practice guides, and training materials that help customers extract maximum value from their Synopsys tools

The Impact You Will Have

• Enable customers to tape out complex designs on 3nm and below by ensuring their parasitic extraction flows deliver the accuracy and capacity they need to close timing
• Accelerate design cycles at key accounts by identifying bottlenecks in extraction workflows and deploying methodologies that cut runtime without sacrificing signoff quality
• Grow Synopsys footprint in your territory by winning competitive evaluations and expanding tool adoption from initial projects to full production flows
• Strengthen customer loyalty by being the engineer they call first when something breaks, and the one who actually gets it fixed
• Influence product roadmap priorities by channeling real-world customer requirements and pain points directly to R&D with the technical context that drives better decisions
• Build technical credibility that opens doors for the broader Synopsys portfolio, turning parasitic extraction wins into opportunities for STA, simulation, and physical verification tools
• Reduce escalation cycle times by owning issues from the field side and ensuring R&D has what they need to reproduce, diagnose, and resolve problems quickly, * You can walk into a customer benchmark, look at their results, and within an hour identify whether the issue is setup, methodology, or an actual tool gap
• When a customer escalation lands, you do not forward the email and hope someone responds. You own it, pull in the right people, and keep everyone updated until it is resolved
• You can explain a complex tradeoff between extraction accuracy and runtime to a design manager in two sentences, and then turn around and give R&D the technical depth they need to act on it
• Presenting to a room full of senior engineers or executives does not rattle you. You know your material, you answer the hard questions, and you do not oversell what the tool can do
• You are organized enough to manage multiple accounts, track a dozen open issues, and still make time to prep a benchmark that could swing a seven-figure deal
• You push back when a customer request does not make technical sense, but you do it in a way that keeps the relationship intact and moves the conversation forward

The Team You’ll Be Part Of

You will be part of the North America Applications Engineering team supporting Silicon Design and Verification customers. The team focuses on parasitic extraction, physical verification, and timing analysis, working closely with sales and R&D to drive business growth and customer success across the region. Your recruiter will share more about team structure, account coverage, and collaboration models during the interview process.

You have spent years deep in the trenches of silicon design, where a single parasitic extraction error can blow a tape-out schedule or kill performance margins on a critical path. You know that advanced FinFET nodes do not forgive approximations, and you have learned to read between the lines when a customer says “it’s running fine” but their results tell a different story.

Walking into a customer site for a technical benchmark does not intimidate you. You have run enough evaluations to know what good looks like, and you can spot the difference between a tool that demos well and one that actually closes timing at 3nm. You are comfortable presenting methodology to a room full of skeptical engineers and backing it up with data they trust.

Managing escalations is not about firefighting for you. It is about understanding the real problem, translating it for R&D without losing the urgency, and keeping the customer confident that someone is actually driving toward resolution. You do not wait for permission to loop in the right people. You build relationships across sales, marketing, and engineering because you know that is how accounts actually grow., * Bachelor’s degree in Electrical Engineering or equivalent, with 7+ years of industry experience, or Master’s degree with 5+ years

• Minimum 2 years of hands-on experience working directly with interconnect parasitic extraction tools such as StarRC or Quickcap on advanced FinFET nodes (7nm and below)
• Strong understanding of digital and custom design flows, including how parasitic extraction fits into timing closure, signoff, and reliability analysis
• Deep knowledge of process technology and how design rules, metal stacks, and device characteristics affect extraction accuracy and performance
• Proficiency in at least one scripting language (TCL, Perl, or Python) for automation, debugging, and workflow customization
• Experience with commercial static timing analysis tools like PrimeTime is a strong plus
• Familiarity with simulation tools such as Hspice or Primesim will help you connect extraction results to circuit-level performance and debug

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.