Wireless PHY Design Verification Engineer

You’ll be part of our vertically integrated organization shaping next-gen wireless technology from concept through production. As a Wireless PHY Design Verification Engineer, you’ll ensure first-time-right silicon success through sophisticated testbenches, comprehensive scenarios, and cutting-edge verification methodologies-enabling multi-gigabit wireless technology connecting the world! Description As a Wireless PHY Design Verification Engineer, you’ll verify sophisticated WiFi PHY digital systems spanning time/frequency-domain processing, hardware acceleration, calibration engines, and protocol implementation. You’ll architect verification strategies for high-rate, low-power, low-latency, and multi-link wireless features enabling advanced applications across Apple’s product ecosystem.

You’ll own subsystem verification from test planning through coverage closure-building environments, constrained random scenarios, and applying analytics methodologies to deliver exceptional wireless silicon. Minimum Qualifications + Minimum requirement of a bachelor’s degree. + Track record of several tapeout cycles of sophisticated designs. + Experience verifying wireless, DSP, or digital communication systems. + Knowledge of ASIC verification flows with SystemVerilog / UVM including testbench architecture, scenario creation, and coverage-driven methodologies. + Experience developing verification environments, bringing up complex designs, and debugging simulations. + Experience with constrained random testing, functional coverage implementation, and assertion-based verification. Preferred Qualifications + Knowledge of IEEE 802.11 wireless protocols, Bluetooth, Cellular, or similar communication systems. + Experience with applying / integrating System models utilizing DPIs. + Understanding of DSP algorithms verification strategies (Bit / Cycle matching, Assertions). + Experience with transaction-level modeling including packet-based approaches (scoreboarding, protocols).