Senior Digital Design Engineer

Edison Smart®

Sheffield, UK

3 months ago

Role details

Contract type

Permanent contract

Employment type

Full-time (> 32 hours)

Experience level

Expert

Working hours

Regular working hours

Job source

find.jobs

Tech stack

Logic Synthesis of Circuits Field-Programmable Gate Array (FPGA) Verilog VHSIC Hardware Description Language (VHDL) Application Specific Integrated Circuits

Requirements

Strong background in FPGA or ASIC Design
RTL design (Verilog, VHDL)
Understanding of testbench development

About the company

Edison Smart is working with a Semiconductor business specialising in wireless technologies.

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Good distractions

Talks and stories from around this role — technically off-topic, practically not.

Moments

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2:22 min

Leveraging unique cultural backgrounds in engineering design

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Hazal Mestci +1 · Coffee With Developers

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