EM
Eli McGarvie
Data Engineer Salary UK
about 3 years ago
Senior Digital Design Engineer
Edison Smart®
Glasgow, UK
3 months ago
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Role details
Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience level
Expert
Working hours
Regular working hours
Job source
Tech stack
Logic Synthesis of Circuits
Field-Programmable Gate Array (FPGA)
Verilog
VHSIC Hardware Description Language (VHDL)
Application Specific Integrated Circuits
Requirements
- Strong background in FPGA or ASIC Design
- RTL design (Verilog, VHDL)
- Understanding of testbench development
About the company
Edison Smart is working with a Semiconductor business specialising in wireless technologies.
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