FPGA Engineer (Graduate - Senior)

• Design and develop FPGA modules and subsystems across a range of devices and SoC platforms.
• Create clean, maintainable RTL (VHDL / Verilog / SystemVerilog); build testbenches and validate via simulation and hardware.
• Integrate FPGA blocks into wider system architectures; collaborate with software, hardware and verification colleagues.
• Keep pace with new devices, tooling and methods; champion quality, reliability and best practice.
• For senior hires: lead work-packages, own interfaces and delivery plans, mentor others, and drive verification strategy.

• Degree in a relevant STEM field (e.g. Electronics, Electrical, Computer or Communications Engineering).
• Strong FPGA design fundamentals and VHDL skills; ability to write, test and debug via simulation and on-device.
• Familiarity with at least one major toolchain (e.g. Vivado, Quartus or Libero) and version control (GIT/SVN/CVS).
• For experienced candidates: proven end-to-end FPGA delivery, interface definition, TCL scripting, and robust verification approaches (e.g., UVM/OSVVM/ABV).
• Bonus points for: experience with Xilinx / Intel (Altera) / Microchip devices; ModelSim/QuestaSim; SystemVerilog/Verilog; Layer-2/3 networking, USB 3.2 or NVMe; Red Hat Linux; interest in cryptographic systems.
• Excellent problem-solving, communication, and time-management; able to work autonomously and collaboratively. *** Due to the nature of the projects and this requiring very high level security clearance, you must be a British Citizen, and have lived in the UK consistently for the past decade - you should be happy to gain security clearance before starting.

• Impactful work on advanced, security-critical products with a supportive, expert team.
• Structured development and progression (mentoring, on-the-job learning, targeted training).
• Competitive package including pension and life assurance, plus additional benefits.

Security & Eligibility:

• Due to project sensitivities, you must be a British Citizen and able to obtain and maintain DV clearance.