Digital IC (Middle-end) Design Engineer
IC Resources
Municipality of Madrid, Spain
3 days ago
Role details
Contract type
Permanent contract Employment type
Full-time (> 32 hours) Working hours
Regular working hours Languages
English, Spanish Experience level
SeniorJob location
Municipality of Madrid, Spain
Tech stack
C++
Logic Synthesis of Circuits
Firmware
Field-Programmable Gate Array (FPGA)
Python
SystemVerilog
Tcl (Programming Language)
Verilog
Scripting (Bash/Python/Go/Ruby)
Application Specific Integrated Circuits
Backend
Job description
Brilliant opportunity for a Senior IC Digital Design Engineer to work for global semiconductor company, with offices in Northern Spain.
Requirements
Applicants MUST be fluent in Spanish AND English. Visa sponsorship is only available for Spanish and English speakers., * Bachelor's or Master's Degree in relevant field, with 5+ years' work experience in ASIC digital design/development processes.
- Excellent RTL coding skills in Verilog
- Knowledge of standard Digital Verification languages (System Verilog, UVM) and metrics.
- Very good understanding of the middle-end/back-end flow: Synthesis, P&R, DFT, STA etc
- Excellent communication skills / fluent English. Knowledge/Experience with the following is a plus:
- Embedded designs and/or firmware development
- UPF / power / low-power constraints
- formal
- FPGA design and validation
- ARM IPs, protocols - AMBA / AXI / designs
- Scripting and automation languages like TCL, Python and C/C++
- Middle-end design experience If you'd like to know more, please apply by sending your CV.
