ASIC Digital IP Design/Verification, Director

• Leading and managing a multi-site team of engineers responsible for ASIC digital IP design and verification, ensuring high-quality deliverables and adherence to project schedules.
• Defining technical direction and envisioning innovative features for IP cores supporting connectivity protocols such as DDR, PCIe, MIPI-UFS, Unipro, SD-MMC, Ethernet, USB, and AMBA.
• Driving the implementation of best-in-class design and verification methodologies, including UVM/VMM/OVM/eRM-based flows, and championing process improvements across the organization.
• Overseeing hiring, team growth, and talent development initiatives, including mentoring junior engineers and fostering a culture of continuous learning and collaboration.
• Collaborating closely with customers, product teams, and upper management to align technical strategies with business objectives and deliver exceptional customer experiences.
• Managing project planning, resource allocation, and risk mitigation to ensure timely and high-quality project delivery in a dynamic, fast-paced environment.
• Contributing hands-on technical expertise in design, verification, and process optimization, and setting up quality processes for IP development.

Do you have experience in Verilog?, You are an accomplished and visionary leader in the field of ASIC digital design and verification, with a passion for driving technical excellence and empowering large, diverse teams. With a robust foundation in electrical engineering and an impressive track record spanning over 16-18 years, you have thrived as both a hands-on innovator and a strategic manager. Your career journey has equipped you with deep technical expertise in VLSI design, IP core development, and verification methodologies, as well as the ability to scale teams, set up robust processes, and deliver industry-leading results on time and within scope.

You are adept at working across global, multi-site environments and excel in building trusted relationships with both customers and executive stakeholders. You see challenges as opportunities, navigating complex technical landscapes and delivering solutions that push the boundaries of what's possible. Your management style is inclusive and collaborative, fostering a culture of mentorship, continuous learning, and open communication. You are known for your ability to inspire teams of 50+ engineers, guiding them through ambiguity and change while maintaining focus on quality and innovation.

A natural communicator and influencer, you have the confidence to represent your organization at the highest levels, the empathy to support and develop your team, and the resilience to thrive in high-pressure situations. Your "Yes, If" attitude and willingness to work within constraints set you apart as a true leader and team player, always striving for excellence and continuous improvement., * BSEE with 18+ years or MSEE with 16+ years of relevant experience in ASIC digital design and verification.

• Demonstrated expertise in VLSI design, including hands-on experience with control path-oriented architectures (e.g., asynchronous FIFO, DMA, SPRAM/DPRAM).
• Deep knowledge of design and verification protocols (DDR, PCIe, MIPI-UFS, Unipro, SD-MMC, Ethernet, USB, AMBA) and experience with IP Cores or SoC design for diverse applications (mobile, automotive, servers, etc.).
• Proficiency in Verilog/System Verilog coding, simulation tools, synthesis flow, static timing analysis, and formal verification.
• Experience with modern verification methodologies (UVM/VMM/OVM/eRM), test bench creation, constrained random verification, coverage management, and revision control systems like Perforce.
• Proven ability to set up, grow, and lead large engineering teams (50+), including remote and multi-site teams.
• Exposure to AI-based tools for simulation optimization and quality process implementation in IP design/verification is a plus., * Inspirational leader with strong people management and interpersonal skills.
• Excellent communicator, adept at influencing and collaborating across all organizational levels.
• Strategic thinker with exceptional problem-solving abilities and a knack for conflict resolution.
• Resilient and composed under pressure, able to make effective decisions in dynamic environments.
• Mentor and coach, passionate about developing talent and fostering a positive team culture.
• Innovative, adaptable, and committed to continuous improvement and learning.
• Enthusiastic team player with a "Yes, If" mindset and the flexibility to work within constraints.

* Influence the technical direction and feature innovation of industry-leading IP cores used in high-performance silicon chips worldwide. * Enable Synopsys' customers to accelerate time-to-market for products in sectors such as automotive, mobile, consumer electronics, and data centers. * Shape and scale a high-performing engineering team, building a culture of excellence, innovation, and collaboration across global sites. * Drive process optimization and quality improvements that set new industry benchmarks for ASIC design and verification. * Represent Synopsys in customer engagements and at industry events, strengthening our position as a market leader in semiconductor IP solutions. * Mentor and develop the next generation of engineering leaders, contributing to the long-term growth and success of Synopsys and its partners., You'll join a high-caliber, globally distributed engineering team at the forefront of ASIC digital IP design and verification. Our team thrives on collaboration, technical excellence, and a shared commitment to driving innovation in connectivity solutions for a wide range of applications. We value diverse perspectives, encourage creative problem-solving, and support each other's growth and success. As a key leader, you'll have the opportunity to shape team culture, drive strategic initiatives, and make a significant impact on Synopsys' product portfolio and industry leadership.